Search

Getente A. Yimer

Examiner (ID: 8170, Phone: (571)270-7106 , Office: P/2181 )

Most Active Art Unit
2181
Art Unit(s)
2181
Total Applications
677
Issued Applications
568
Pending Applications
70
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18631421 [patent_doc_number] => 20230290320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => INFORMATION PROCESSING DEVICE, CONTROL CIRCUIT, AND INFORMATION PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 18/321780 [patent_app_country] => US [patent_app_date] => 2023-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18321780 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/321780
Information processing device, control circuit, and information processing method May 22, 2023 Issued
Array ( [id] => 19917481 [patent_doc_number] => 12292850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Communication system between dies and operation method thereof [patent_app_type] => utility [patent_app_number] => 18/322537 [patent_app_country] => US [patent_app_date] => 2023-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4572 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18322537 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/322537
Communication system between dies and operation method thereof May 22, 2023 Issued
Array ( [id] => 18957499 [patent_doc_number] => 20240045826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => MICRO CONTROLLER UNIT, OPERATION SYSTEM, AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/319771 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319771 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/319771
Micro controller unit, operation system, and control method May 17, 2023 Issued
Array ( [id] => 19558606 [patent_doc_number] => 20240370398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => UNIVERSAL INTERSYSTEM CONNECTION FOR A WEARABLE DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/312971 [patent_app_country] => US [patent_app_date] => 2023-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10657 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312971 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/312971
UNIVERSAL INTERSYSTEM CONNECTION FOR A WEARABLE DISPLAY DEVICE May 4, 2023 Abandoned
Array ( [id] => 19545138 [patent_doc_number] => 20240362174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => DEBUGGING SYSTEM AND A DRIVER ADAPTABLE THERETO [patent_app_type] => utility [patent_app_number] => 18/141367 [patent_app_country] => US [patent_app_date] => 2023-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1275 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141367 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/141367
DEBUGGING SYSTEM AND A DRIVER ADAPTABLE THERETO Apr 28, 2023 Pending
Array ( [id] => 19544924 [patent_doc_number] => 20240361960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => TIME SYNCHRONIZATION ACROSS INDEPENDENT INPUT/OUTPUT SCHEDULERS [patent_app_type] => utility [patent_app_number] => 18/140703 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/140703
TIME SYNCHRONIZATION ACROSS INDEPENDENT INPUT/OUTPUT SCHEDULERS Apr 27, 2023 Pending
Array ( [id] => 19544924 [patent_doc_number] => 20240361960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => TIME SYNCHRONIZATION ACROSS INDEPENDENT INPUT/OUTPUT SCHEDULERS [patent_app_type] => utility [patent_app_number] => 18/140703 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/140703
TIME SYNCHRONIZATION ACROSS INDEPENDENT INPUT/OUTPUT SCHEDULERS Apr 27, 2023 Pending
Array ( [id] => 18568948 [patent_doc_number] => 20230259284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => NETWORK INTERFACE CARD, CONTROLLER, STORAGE APPARATUS, AND PACKET SENDING METHOD [patent_app_type] => utility [patent_app_number] => 18/308118 [patent_app_country] => US [patent_app_date] => 2023-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308118 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/308118
Network interface card, controller, storage apparatus, and packet sending method Apr 26, 2023 Issued
Array ( [id] => 18881210 [patent_doc_number] => 20240004579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => COMPUTATIONAL STORAGE DEVICE, AND COMPUTATIONAL STORAGE SYSTEM AND ELECTRONIC SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/134698 [patent_app_country] => US [patent_app_date] => 2023-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134698 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/134698
COMPUTATIONAL STORAGE DEVICE, AND COMPUTATIONAL STORAGE SYSTEM AND ELECTRONIC SYSTEM INCLUDING THE SAME Apr 13, 2023 Pending
Array ( [id] => 18678014 [patent_doc_number] => 20230315661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => METHODS AND APPARATUS TO CONFIGURE AN INTEGRATED CIRCUIT USING A DIRECT MEMORY ACCESS CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/129665 [patent_app_country] => US [patent_app_date] => 2023-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8183 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18129665 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/129665
METHODS AND APPARATUS TO CONFIGURE AN INTEGRATED CIRCUIT USING A DIRECT MEMORY ACCESS CONTROLLER Mar 30, 2023 Pending
Array ( [id] => 18678014 [patent_doc_number] => 20230315661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => METHODS AND APPARATUS TO CONFIGURE AN INTEGRATED CIRCUIT USING A DIRECT MEMORY ACCESS CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/129665 [patent_app_country] => US [patent_app_date] => 2023-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8183 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18129665 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/129665
METHODS AND APPARATUS TO CONFIGURE AN INTEGRATED CIRCUIT USING A DIRECT MEMORY ACCESS CONTROLLER Mar 30, 2023 Pending
Array ( [id] => 20215132 [patent_doc_number] => 12411785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Direct memory access system with read reassembly circuit [patent_app_type] => utility [patent_app_number] => 18/193129 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5791 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18193129 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/193129
Direct memory access system with read reassembly circuit Mar 29, 2023 Issued
Array ( [id] => 18651688 [patent_doc_number] => 20230297524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => Data Transmission System [patent_app_type] => utility [patent_app_number] => 18/126007 [patent_app_country] => US [patent_app_date] => 2023-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18126007 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/126007
Data transmission system Mar 23, 2023 Issued
Array ( [id] => 19434586 [patent_doc_number] => 20240303084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => EXECUTABLE COMMAND SECURITY [patent_app_type] => utility [patent_app_number] => 18/179554 [patent_app_country] => US [patent_app_date] => 2023-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179554 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/179554
EXECUTABLE COMMAND SECURITY Mar 6, 2023 Pending
Array ( [id] => 19971580 [patent_doc_number] => 12340195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Handling interrupts from a virtual function in a system with a reconfigurable processor [patent_app_type] => utility [patent_app_number] => 18/118428 [patent_app_country] => US [patent_app_date] => 2023-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 17944 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18118428 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/118428
Handling interrupts from a virtual function in a system with a reconfigurable processor Mar 6, 2023 Issued
Array ( [id] => 19971580 [patent_doc_number] => 12340195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Handling interrupts from a virtual function in a system with a reconfigurable processor [patent_app_type] => utility [patent_app_number] => 18/118428 [patent_app_country] => US [patent_app_date] => 2023-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 17944 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18118428 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/118428
Handling interrupts from a virtual function in a system with a reconfigurable processor Mar 6, 2023 Issued
Array ( [id] => 20273767 [patent_doc_number] => 12443549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Memory system and control method [patent_app_type] => utility [patent_app_number] => 18/113483 [patent_app_country] => US [patent_app_date] => 2023-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 5945 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 433 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18113483 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/113483
Memory system and control method Feb 22, 2023 Issued
Array ( [id] => 20273767 [patent_doc_number] => 12443549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Memory system and control method [patent_app_type] => utility [patent_app_number] => 18/113483 [patent_app_country] => US [patent_app_date] => 2023-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 5945 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 433 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18113483 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/113483
Memory system and control method Feb 22, 2023 Issued
Array ( [id] => 18553970 [patent_doc_number] => 20230251983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => HYBRID ASYNCHRONOUS NETWORK-ON-CHIP OPTIMIZED FOR ARTIFICIAL INTELLIGENCE WORKLOADS [patent_app_type] => utility [patent_app_number] => 18/106476 [patent_app_country] => US [patent_app_date] => 2023-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18106476 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/106476
HYBRID ASYNCHRONOUS NETWORK-ON-CHIP OPTIMIZED FOR ARTIFICIAL INTELLIGENCE WORKLOADS Feb 5, 2023 Abandoned
Array ( [id] => 18422275 [patent_doc_number] => 20230176739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => ARTIFICIAL INTELLIGENCE ACCELERATOR [patent_app_type] => utility [patent_app_number] => 18/105539 [patent_app_country] => US [patent_app_date] => 2023-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18105539 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/105539
ARTIFICIAL INTELLIGENCE ACCELERATOR Feb 2, 2023 Pending
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