
Ginette Peralta
Examiner (ID: 17098)
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814 |
| Total Applications | 286 |
| Issued Applications | 235 |
| Pending Applications | 4 |
| Abandoned Applications | 47 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6807330
[patent_doc_number] => 20030197269
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-23
[patent_title] => 'Test fixture for semiconductor packages'
[patent_app_type] => new
[patent_app_number] => 10/192378
[patent_app_country] => US
[patent_app_date] => 2002-07-10
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 3173
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[pdf_file] => publications/A1/0197/20030197269.pdf
[firstpage_image] =>[orig_patent_app_number] => 10192378
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/192378 | Test fixture for semiconductor packages | Jul 9, 2002 | Abandoned |
Array
(
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[patent_doc_number] => 20030139034
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-24
[patent_title] => 'Dual damascene structure and method of making same'
[patent_app_type] => new
[patent_app_number] => 10/064364
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[pdf_file] => publications/A1/0139/20030139034.pdf
[firstpage_image] =>[orig_patent_app_number] => 10064364
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/064364 | Dual damascene structure and method of making same | Jul 6, 2002 | Abandoned |
Array
(
[id] => 6044326
[patent_doc_number] => 20020167040
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-14
[patent_title] => 'Capacitor for semiconductor device and method for manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/186673
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[patent_app_date] => 2002-07-02
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[pdf_file] => publications/A1/0167/20020167040.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/186673 | Capacitor for semiconductor device and method for manufacturing the same | Jul 1, 2002 | Issued |
Array
(
[id] => 1149285
[patent_doc_number] => 06770523
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-08-03
[patent_title] => 'Method for semiconductor wafer planarization by CMP stop layer formation'
[patent_app_type] => B1
[patent_app_number] => 10/190397
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[patent_app_date] => 2002-07-02
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/190397 | Method for semiconductor wafer planarization by CMP stop layer formation | Jul 1, 2002 | Issued |
Array
(
[id] => 1386794
[patent_doc_number] => 06555888
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[patent_issue_date] => 2003-04-29
[patent_title] => 'Electrostatic discharge protection for sensors'
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[patent_app_number] => 10/186801
[patent_app_country] => US
[patent_app_date] => 2002-07-01
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[pdf_file] => patents/06/555/06555888.pdf
[firstpage_image] =>[orig_patent_app_number] => 10186801
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/186801 | Electrostatic discharge protection for sensors | Jun 30, 2002 | Issued |
Array
(
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[patent_doc_number] => 06929713
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[patent_issue_date] => 2005-08-16
[patent_title] => 'In-situ photoresist removal by an attachable chamber with light source'
[patent_app_type] => utility
[patent_app_number] => 10/186533
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/186533 | In-situ photoresist removal by an attachable chamber with light source | Jun 30, 2002 | Issued |
Array
(
[id] => 1245760
[patent_doc_number] => 06677240
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[patent_issue_date] => 2004-01-13
[patent_title] => 'Method for patterning dense and isolated features on semiconductor devices'
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[pdf_file] => patents/06/677/06677240.pdf
[firstpage_image] =>[orig_patent_app_number] => 10186033
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/186033 | Method for patterning dense and isolated features on semiconductor devices | Jun 27, 2002 | Issued |
Array
(
[id] => 1031077
[patent_doc_number] => 06878629
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-04-12
[patent_title] => 'Method for detecting CMP endpoint in acidic slurries'
[patent_app_type] => utility
[patent_app_number] => 10/185818
[patent_app_country] => US
[patent_app_date] => 2002-06-27
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 10185818
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/185818 | Method for detecting CMP endpoint in acidic slurries | Jun 26, 2002 | Issued |
Array
(
[id] => 6651334
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[patent_issue_date] => 2003-01-09
[patent_title] => 'Method of fabricating a MOS transistor with a drain extension and corresponding transistor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/184036 | Method of fabricating a MOS transistor with a drain extension and corresponding transistor | Jun 26, 2002 | Issued |
Array
(
[id] => 982319
[patent_doc_number] => 06927163
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-09
[patent_title] => 'Method and apparatus for manufacturing a barrier layer of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/180754
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[firstpage_image] =>[orig_patent_app_number] => 10180754
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/180754 | Method and apparatus for manufacturing a barrier layer of semiconductor device | Jun 25, 2002 | Issued |
Array
(
[id] => 6327408
[patent_doc_number] => 20020197830
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[patent_title] => 'Method and apparatus for producing group III nitride compound semiconductor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/178853 | Method and apparatus for producing group III nitride compound semiconductor | Jun 24, 2002 | Issued |
Array
(
[id] => 975486
[patent_doc_number] => 06933221
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[patent_title] => 'Method for underfilling semiconductor components using no flow underfill'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/178703 | Method for underfilling semiconductor components using no flow underfill | Jun 23, 2002 | Issued |
Array
(
[id] => 6048256
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[patent_title] => 'Insulators for high density circuits'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/179151 | Insulators for high density circuits | Jun 23, 2002 | Issued |
Array
(
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[patent_title] => 'Integrated process for fuse opening and passivation process for CU/LOW-K IMD'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/176943 | Integrated process for fuse opening and passivation process for CU/LOW-K IMD | Jun 20, 2002 | Issued |
Array
(
[id] => 1097533
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[patent_title] => 'Semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/167573 | Semiconductor device | Jun 12, 2002 | Issued |
Array
(
[id] => 6701734
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Array
(
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/142063 | Manufacturing method of semiconductor integrated circuit device, and semiconductor integrated circuit device | May 9, 2002 | Issued |