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Ginette Peralta

Examiner (ID: 17496)

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
286
Issued Applications
235
Pending Applications
4
Abandoned Applications
47

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1387253 [patent_doc_number] => 06555913 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-29 [patent_title] => 'Electronic component having a coil conductor with photosensitive conductive paste' [patent_app_type] => B1 [patent_app_number] => 09/350038 [patent_app_country] => US [patent_app_date] => 1999-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 25 [patent_no_of_words] => 7008 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/555/06555913.pdf [firstpage_image] =>[orig_patent_app_number] => 09350038 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/350038
Electronic component having a coil conductor with photosensitive conductive paste Jul 7, 1999 Issued
Array ( [id] => 1463699 [patent_doc_number] => 06351021 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-26 [patent_title] => 'Low temperature coefficient resistor (TCRL)' [patent_app_type] => B1 [patent_app_number] => 09/345929 [patent_app_country] => US [patent_app_date] => 1999-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 3511 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/351/06351021.pdf [firstpage_image] =>[orig_patent_app_number] => 09345929 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/345929
Low temperature coefficient resistor (TCRL) Jun 30, 1999 Issued
Array ( [id] => 4258692 [patent_doc_number] => 06204152 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor' [patent_app_type] => 1 [patent_app_number] => 9/340489 [patent_app_country] => US [patent_app_date] => 1999-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6431 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204152.pdf [firstpage_image] =>[orig_patent_app_number] => 340489 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340489
Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor Jun 29, 1999 Issued
Array ( [id] => 4360480 [patent_doc_number] => 06218695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Area efficient column select circuitry for 2-bit non-volatile memory cells' [patent_app_type] => 1 [patent_app_number] => 9/340979 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 9405 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218695.pdf [firstpage_image] =>[orig_patent_app_number] => 340979 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340979
Area efficient column select circuitry for 2-bit non-volatile memory cells Jun 27, 1999 Issued
Array ( [id] => 4336531 [patent_doc_number] => 06333241 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Method for fabricating capacitor of semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/339379 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2472 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/333/06333241.pdf [firstpage_image] =>[orig_patent_app_number] => 339379 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339379
Method for fabricating capacitor of semiconductor memory device Jun 23, 1999 Issued
Array ( [id] => 5951482 [patent_doc_number] => 20020006708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-17 [patent_title] => 'METHOD OF FORMING SELECTIVE METAL LAYER AND METHOD OF FORMING CAPACITOR AND FILLING CONTACT HOLE USING THE SAME' [patent_app_type] => new [patent_app_number] => 09/334588 [patent_app_country] => US [patent_app_date] => 1999-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7720 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20020006708.pdf [firstpage_image] =>[orig_patent_app_number] => 09334588 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/334588
Method of forming selective metal layer and method of forming capacitor and filling contact hole using the same Jun 15, 1999 Issued
Array ( [id] => 1581195 [patent_doc_number] => 06423626 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Removal of metal cusp for improved contact fill' [patent_app_type] => B1 [patent_app_number] => 09/334753 [patent_app_country] => US [patent_app_date] => 1999-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5249 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/423/06423626.pdf [firstpage_image] =>[orig_patent_app_number] => 09334753 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/334753
Removal of metal cusp for improved contact fill Jun 15, 1999 Issued
Array ( [id] => 4325121 [patent_doc_number] => 06329272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Method and apparatus for iteratively, selectively tuning the impedance of integrated semiconductor devices using a focussed heating source' [patent_app_type] => 1 [patent_app_number] => 9/332059 [patent_app_country] => US [patent_app_date] => 1999-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 11435 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329272.pdf [firstpage_image] =>[orig_patent_app_number] => 332059 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/332059
Method and apparatus for iteratively, selectively tuning the impedance of integrated semiconductor devices using a focussed heating source Jun 13, 1999 Issued
Array ( [id] => 1421061 [patent_doc_number] => 06509589 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Method and apparatus for compensating for ionizing radiation induced threshold shift in metal oxide semiconductor field transistors' [patent_app_type] => B1 [patent_app_number] => 09/332599 [patent_app_country] => US [patent_app_date] => 1999-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1433 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509589.pdf [firstpage_image] =>[orig_patent_app_number] => 09332599 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/332599
Method and apparatus for compensating for ionizing radiation induced threshold shift in metal oxide semiconductor field transistors Jun 13, 1999 Issued
Array ( [id] => 4405244 [patent_doc_number] => 06271127 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Method for dual damascene process using electron beam and ion implantation cure methods for low dielectric constant materials' [patent_app_type] => 1 [patent_app_number] => 9/329569 [patent_app_country] => US [patent_app_date] => 1999-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 30 [patent_no_of_words] => 5134 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271127.pdf [firstpage_image] =>[orig_patent_app_number] => 329569 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/329569
Method for dual damascene process using electron beam and ion implantation cure methods for low dielectric constant materials Jun 9, 1999 Issued
Array ( [id] => 6395984 [patent_doc_number] => 20020036346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-28 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING DAMASCENE INTERCONNECTION STRUCTURE THAT PREVENTS VOID FORMATION BETWEEN INTERCONNECTIONS' [patent_app_type] => new [patent_app_number] => 09/329249 [patent_app_country] => US [patent_app_date] => 1999-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3190 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20020036346.pdf [firstpage_image] =>[orig_patent_app_number] => 09329249 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/329249
Semiconductor device having damascene interconnection structure that prevents void formation between interconnections Jun 9, 1999 Issued
Array ( [id] => 773485 [patent_doc_number] => 07001829 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-21 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 09/327469 [patent_app_country] => US [patent_app_date] => 1999-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 41 [patent_no_of_words] => 13257 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/001/07001829.pdf [firstpage_image] =>[orig_patent_app_number] => 09327469 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/327469
Semiconductor device and method of manufacturing the same Jun 7, 1999 Issued
Array ( [id] => 4360495 [patent_doc_number] => 06218696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Layout and wiring scheme for memory cells with vertical transistors' [patent_app_type] => 1 [patent_app_number] => 9/326889 [patent_app_country] => US [patent_app_date] => 1999-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218696.pdf [firstpage_image] =>[orig_patent_app_number] => 326889 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/326889
Layout and wiring scheme for memory cells with vertical transistors Jun 6, 1999 Issued
Array ( [id] => 1576275 [patent_doc_number] => 06469338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-22 [patent_title] => 'Non-volatile semiconductor memory device and manufacturing method thereof' [patent_app_type] => B2 [patent_app_number] => 09/324808 [patent_app_country] => US [patent_app_date] => 1999-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 7768 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/469/06469338.pdf [firstpage_image] =>[orig_patent_app_number] => 09324808 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/324808
Non-volatile semiconductor memory device and manufacturing method thereof Jun 2, 1999 Issued
Array ( [id] => 4278376 [patent_doc_number] => 06323558 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Method for fabricating a contact of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/323889 [patent_app_country] => US [patent_app_date] => 1999-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 3587 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323558.pdf [firstpage_image] =>[orig_patent_app_number] => 323889 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/323889
Method for fabricating a contact of a semiconductor device Jun 1, 1999 Issued
Array ( [id] => 1582907 [patent_doc_number] => 06423998 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Semiconductor device capacitor and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/323009 [patent_app_country] => US [patent_app_date] => 1999-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4681 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/423/06423998.pdf [firstpage_image] =>[orig_patent_app_number] => 09323009 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/323009
Semiconductor device capacitor and method of manufacturing the same May 31, 1999 Issued
Array ( [id] => 1495021 [patent_doc_number] => 06403462 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Method for manufacturing high reliability interconnection having diffusion barrier layer' [patent_app_type] => B1 [patent_app_number] => 09/321848 [patent_app_country] => US [patent_app_date] => 1999-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 36 [patent_no_of_words] => 16801 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403462.pdf [firstpage_image] =>[orig_patent_app_number] => 09321848 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/321848
Method for manufacturing high reliability interconnection having diffusion barrier layer May 27, 1999 Issued
Array ( [id] => 4271667 [patent_doc_number] => 06323128 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Method for forming Co-W-P-Au films' [patent_app_type] => 1 [patent_app_number] => 9/320499 [patent_app_country] => US [patent_app_date] => 1999-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4774 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323128.pdf [firstpage_image] =>[orig_patent_app_number] => 320499 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/320499
Method for forming Co-W-P-Au films May 25, 1999 Issued
Array ( [id] => 1495053 [patent_doc_number] => 06403473 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Process for producing metal-containing layers' [patent_app_type] => B1 [patent_app_number] => 09/315329 [patent_app_country] => US [patent_app_date] => 1999-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2231 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403473.pdf [firstpage_image] =>[orig_patent_app_number] => 09315329 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/315329
Process for producing metal-containing layers May 19, 1999 Issued
Array ( [id] => 1446690 [patent_doc_number] => 06368984 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Insulating film and method of forming the same' [patent_app_type] => B1 [patent_app_number] => 09/313978 [patent_app_country] => US [patent_app_date] => 1999-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 8601 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/368/06368984.pdf [firstpage_image] =>[orig_patent_app_number] => 09313978 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/313978
Insulating film and method of forming the same May 18, 1999 Issued
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