Ginger T. Chapman

Array ( [id] => 1583029 [patent_doc_number] => 06424028 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Semiconductor devices configured to tolerate connection misalignment' [patent_app_type] => B1 [patent_app_number] => 09/671889 [patent_app_country] => US [patent_app_date] => 2000-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6390 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/424/06424028.pdf [firstpage_image] =>[orig_patent_app_number] => 09671889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1420978 [patent_doc_number] => 06521972 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'RF power transistor having low parasitic impedance input feed structure' [patent_app_type] => B1 [patent_app_number] => 09/675098 [patent_app_country] => US [patent_app_date] => 2000-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1359 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521972.pdf [firstpage_image] =>[orig_patent_app_number] => 09675098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1380203 [patent_doc_number] => 06563193 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/670548 [patent_app_country] => US [patent_app_date] => 2000-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 7957 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563193.pdf [firstpage_image] =>[orig_patent_app_number] => 09670548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1136399 [patent_doc_number] => 06784496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Circuit and method for an integrated charged device model clamp' [patent_app_type] => B1 [patent_app_number] => 09/668999 [patent_app_country] => US [patent_app_date] => 2000-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2617 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784496.pdf [firstpage_image] =>[orig_patent_app_number] => 09668999 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1381867 [patent_doc_number] => 06551891 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-22 [patent_title] => 'Process for fabricating a self-aligned vertical bipolar transistor' [patent_app_type] => B1 [patent_app_number] => 09/668428 [patent_app_country] => US [patent_app_date] => 2000-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4273 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/551/06551891.pdf [firstpage_image] =>[orig_patent_app_number] => 09668428 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1380214 [patent_doc_number] => 06563194 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'BJT with surface resistor connection' [patent_app_type] => B1 [patent_app_number] => 09/666848 [patent_app_country] => US [patent_app_date] => 2000-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2938 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563194.pdf [firstpage_image] =>[orig_patent_app_number] => 09666848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1210970 [patent_doc_number] => 06713864 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Semiconductor package for enhancing heat dissipation' [patent_app_type] => B1 [patent_app_number] => 09/665818 [patent_app_country] => US [patent_app_date] => 2000-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3044 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/713/06713864.pdf [firstpage_image] =>[orig_patent_app_number] => 09665818 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1480541 [patent_doc_number] => 06452235 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Floating body ESD protection circuit' [patent_app_type] => B1 [patent_app_number] => 09/664108 [patent_app_country] => US [patent_app_date] => 2000-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2597 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452235.pdf [firstpage_image] =>[orig_patent_app_number] => 09664108 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1384468 [patent_doc_number] => 06559508 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'ESD protection device for open drain I/O pad in integrated circuits with merged layout structure' [patent_app_type] => B1 [patent_app_number] => 09/664419 [patent_app_country] => US [patent_app_date] => 2000-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3786 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/559/06559508.pdf [firstpage_image] =>[orig_patent_app_number] => 09664419 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1125179 [patent_doc_number] => 06794689 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'High voltage semiconductor component' [patent_app_type] => B1 [patent_app_number] => 09/554800 [patent_app_country] => US [patent_app_date] => 2000-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 40 [patent_no_of_words] => 4034 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794689.pdf [firstpage_image] =>[orig_patent_app_number] => 09554800 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1291354 [patent_doc_number] => 06633075 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-14 [patent_title] => 'Heterojunction bipolar transistor and method for fabricating the same' [patent_app_type] => B1 [patent_app_number] => 09/641819 [patent_app_country] => US [patent_app_date] => 2000-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 49 [patent_no_of_words] => 11045 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/633/06633075.pdf [firstpage_image] =>[orig_patent_app_number] => 09641819 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1384873 [patent_doc_number] => 06559532 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Matrix converter' [patent_app_type] => B1 [patent_app_number] => 09/622354 [patent_app_country] => US [patent_app_date] => 2000-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4430 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/559/06559532.pdf [firstpage_image] =>[orig_patent_app_number] => 09622354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1414365 [patent_doc_number] => 06535101 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Low loss high Q inductor' [patent_app_type] => B1 [patent_app_number] => 09/630549 [patent_app_country] => US [patent_app_date] => 2000-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 4340 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535101.pdf [firstpage_image] =>[orig_patent_app_number] => 09630549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1241513 [patent_doc_number] => 06683336 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-27 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT, SUPPLY METHOD FOR SUPPLYING MULTIPLE SUPPLY VOLTAGES IN SEMICONDUCTOR INTEGRATED CIRCUIT, AND RECORD MEDIUM FOR STORING PROGRAM OF SUPPLY METHOD FOR SUPPLYING MULTIPLE SUPPLY VOLTAGES IN SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => B1 [patent_app_number] => 09/609408 [patent_app_country] => US [patent_app_date] => 2000-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 8777 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 417 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/683/06683336.pdf [firstpage_image] =>[orig_patent_app_number] => 09609408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1120855 [patent_doc_number] => 06798024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-28 [patent_title] => 'BiCMOS process with low temperature coefficient resistor (TCRL)' [patent_app_type] => B1 [patent_app_number] => 09/607080 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 4577 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798024.pdf [firstpage_image] =>[orig_patent_app_number] => 09607080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1113696 [patent_doc_number] => 06803609 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-12 [patent_title] => 'Bipolar high-voltage power component' [patent_app_type] => B1 [patent_app_number] => 09/603748 [patent_app_country] => US [patent_app_date] => 2000-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2769 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/803/06803609.pdf [firstpage_image] =>[orig_patent_app_number] => 09603748 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 770168 [patent_doc_number] => 07005702 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-28 [patent_title] => 'IGBT with amorphous silicon transparent collector' [patent_app_type] => utility [patent_app_number] => 09/566219 [patent_app_country] => US [patent_app_date] => 2000-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2544 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/005/07005702.pdf [firstpage_image] =>[orig_patent_app_number] => 09566219 [rel_patent_id] =>[rel_patent_doc_number] =>)