Search

Ginger T. Chapman

Examiner (ID: 14934)

Most Active Art Unit
3761
Art Unit(s)
3761
Total Applications
513
Issued Applications
281
Pending Applications
11
Abandoned Applications
222

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1241503 [patent_doc_number] => 06683326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-27 [patent_title] => 'Semiconductor photodiode and an optical receiver' [patent_app_type] => B2 [patent_app_number] => 09/986366 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5696 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/683/06683326.pdf [firstpage_image] =>[orig_patent_app_number] => 09986366 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/986366
Semiconductor photodiode and an optical receiver Nov 7, 2001 Issued
Array ( [id] => 6123465 [patent_doc_number] => 20020074621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Variable tunable range mems capacitor' [patent_app_type] => new [patent_app_number] => 09/992796 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4527 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20020074621.pdf [firstpage_image] =>[orig_patent_app_number] => 09992796 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/992796
Variable tunable range MEMS capacitor Nov 4, 2001 Issued
Array ( [id] => 1232365 [patent_doc_number] => 06693315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-17 [patent_title] => 'Semiconductor device with an active region and plural dummy regions' [patent_app_type] => B2 [patent_app_number] => 09/985309 [patent_app_country] => US [patent_app_date] => 2001-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 32 [patent_no_of_words] => 10665 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693315.pdf [firstpage_image] =>[orig_patent_app_number] => 09985309 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/985309
Semiconductor device with an active region and plural dummy regions Nov 1, 2001 Issued
Array ( [id] => 6300666 [patent_doc_number] => 20020093102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-18 [patent_title] => 'Transistor with ESD protection' [patent_app_type] => new [patent_app_number] => 10/001179 [patent_app_country] => US [patent_app_date] => 2001-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3043 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20020093102.pdf [firstpage_image] =>[orig_patent_app_number] => 10001179 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/001179
Transistor with ESD protection Nov 1, 2001 Issued
Array ( [id] => 1386711 [patent_doc_number] => 06555883 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-29 [patent_title] => 'Lateral power MOSFET for high switching speeds' [patent_app_type] => B1 [patent_app_number] => 10/016748 [patent_app_country] => US [patent_app_date] => 2001-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2690 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/555/06555883.pdf [firstpage_image] =>[orig_patent_app_number] => 10016748 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/016748
Lateral power MOSFET for high switching speeds Oct 28, 2001 Issued
Array ( [id] => 6646562 [patent_doc_number] => 20030075713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Heterojunction bipolar transistor' [patent_app_type] => new [patent_app_number] => 10/032779 [patent_app_country] => US [patent_app_date] => 2001-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1852 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20030075713.pdf [firstpage_image] =>[orig_patent_app_number] => 10032779 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/032779
Heterojunction bipolar transistor Oct 21, 2001 Abandoned
Array ( [id] => 1341386 [patent_doc_number] => 06586308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-01 [patent_title] => 'Method for producing circuit structures on a semiconductor substrate and semiconductor configuration with functional circuit structures and dummy circuit structures' [patent_app_type] => B2 [patent_app_number] => 09/981856 [patent_app_country] => US [patent_app_date] => 2001-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2425 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/586/06586308.pdf [firstpage_image] =>[orig_patent_app_number] => 09981856 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/981856
Method for producing circuit structures on a semiconductor substrate and semiconductor configuration with functional circuit structures and dummy circuit structures Oct 17, 2001 Issued
Array ( [id] => 6506246 [patent_doc_number] => 20020134991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Semiconductor device for low voltage protection with low capacitance' [patent_app_type] => new [patent_app_number] => 09/958987 [patent_app_country] => US [patent_app_date] => 2001-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12007 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20020134991.pdf [firstpage_image] =>[orig_patent_app_number] => 09958987 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/958987
Semiconductor device for low voltage protection with low capacitance Oct 11, 2001 Abandoned
Array ( [id] => 1158325 [patent_doc_number] => 06765247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Integrated circuit with a MOS structure having reduced parasitic bipolar transistor action' [patent_app_type] => B2 [patent_app_number] => 09/977188 [patent_app_country] => US [patent_app_date] => 2001-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 7954 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765247.pdf [firstpage_image] =>[orig_patent_app_number] => 09977188 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/977188
Integrated circuit with a MOS structure having reduced parasitic bipolar transistor action Oct 11, 2001 Issued
Array ( [id] => 1468463 [patent_doc_number] => 06459102 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Peripheral structure for monolithic power device' [patent_app_type] => B1 [patent_app_number] => 09/868517 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6616 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/459/06459102.pdf [firstpage_image] =>[orig_patent_app_number] => 09868517 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/868517
Peripheral structure for monolithic power device Oct 8, 2001 Issued
Array ( [id] => 6205376 [patent_doc_number] => 20020070412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Integrated semiconductor device having a lateral power element' [patent_app_type] => new [patent_app_number] => 09/968660 [patent_app_country] => US [patent_app_date] => 2001-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6923 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20020070412.pdf [firstpage_image] =>[orig_patent_app_number] => 09968660 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/968660
Integrated semiconductor device having a lateral power element Sep 30, 2001 Abandoned
Array ( [id] => 1394534 [patent_doc_number] => 06552567 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-22 [patent_title] => 'Functional pathway configuration at a system/IC interface' [patent_app_type] => B1 [patent_app_number] => 09/964664 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3295 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/552/06552567.pdf [firstpage_image] =>[orig_patent_app_number] => 09964664 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/964664
Functional pathway configuration at a system/IC interface Sep 27, 2001 Issued
Array ( [id] => 1253352 [patent_doc_number] => 06670255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-30 [patent_title] => 'Method of fabricating lateral diodes and bipolar transistors' [patent_app_type] => B2 [patent_app_number] => 09/965289 [patent_app_country] => US [patent_app_date] => 2001-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4031 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/670/06670255.pdf [firstpage_image] =>[orig_patent_app_number] => 09965289 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/965289
Method of fabricating lateral diodes and bipolar transistors Sep 26, 2001 Issued
Array ( [id] => 6671855 [patent_doc_number] => 20030057458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Bipolar device having shallow junction raised extrinsic base and method for making the same' [patent_app_type] => new [patent_app_number] => 09/962738 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3351 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20030057458.pdf [firstpage_image] =>[orig_patent_app_number] => 09962738 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/962738
Bipolar device having shallow junction raised extrinsic base and method for making the same Sep 24, 2001 Issued
Array ( [id] => 1044084 [patent_doc_number] => 06867454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-15 [patent_title] => 'Power semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 09/961248 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6573 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867454.pdf [firstpage_image] =>[orig_patent_app_number] => 09961248 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/961248
Power semiconductor device and manufacturing method thereof Sep 24, 2001 Issued
Array ( [id] => 1272804 [patent_doc_number] => 06653694 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-25 [patent_title] => 'Reference voltage semiconductor' [patent_app_type] => B1 [patent_app_number] => 09/956309 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 6246 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/653/06653694.pdf [firstpage_image] =>[orig_patent_app_number] => 09956309 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/956309
Reference voltage semiconductor Sep 18, 2001 Issued
Array ( [id] => 5901097 [patent_doc_number] => 20020140078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Power semiconductor device' [patent_app_type] => new [patent_app_number] => 09/954149 [patent_app_country] => US [patent_app_date] => 2001-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2433 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20020140078.pdf [firstpage_image] =>[orig_patent_app_number] => 09954149 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/954149
Power semiconductor device Sep 17, 2001 Issued
Array ( [id] => 1389526 [patent_doc_number] => 06556046 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-29 [patent_title] => 'Functional pathway configuration at a system/IC interface' [patent_app_type] => B1 [patent_app_number] => 09/953059 [patent_app_country] => US [patent_app_date] => 2001-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4071 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/556/06556046.pdf [firstpage_image] =>[orig_patent_app_number] => 09953059 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/953059
Functional pathway configuration at a system/IC interface Sep 13, 2001 Issued
Array ( [id] => 1272919 [patent_doc_number] => 06653726 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-25 [patent_title] => 'Power redistribution bus for a wire bonded integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/948190 [patent_app_country] => US [patent_app_date] => 2001-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2663 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/653/06653726.pdf [firstpage_image] =>[orig_patent_app_number] => 09948190 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/948190
Power redistribution bus for a wire bonded integrated circuit Sep 6, 2001 Issued
Array ( [id] => 1371328 [patent_doc_number] => 06570427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-27 [patent_title] => 'Variable transconductance amplifier' [patent_app_type] => B2 [patent_app_number] => 09/943668 [patent_app_country] => US [patent_app_date] => 2001-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5431 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570427.pdf [firstpage_image] =>[orig_patent_app_number] => 09943668 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/943668
Variable transconductance amplifier Aug 30, 2001 Issued
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