Search

Glenn Allen Auve

Examiner (ID: 3740, Phone: (571)272-3623 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2181, 2186, 2308, 2111, 2185, 2175, 2781, 2305
Total Applications
2279
Issued Applications
2041
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3106837 [patent_doc_number] => 05313593 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'Personal computer system with bus noise rejection' [patent_app_type] => 1 [patent_app_number] => 7/947018 [patent_app_country] => US [patent_app_date] => 1992-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3438 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/313/05313593.pdf [firstpage_image] =>[orig_patent_app_number] => 947018 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/947018
Personal computer system with bus noise rejection Sep 16, 1992 Issued
Array ( [id] => 3456531 [patent_doc_number] => 05388225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-07 [patent_title] => 'Time-domain boundary bridge method and apparatus for asynchronous sequential machines' [patent_app_type] => 1 [patent_app_number] => 7/945548 [patent_app_country] => US [patent_app_date] => 1992-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2574 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/388/05388225.pdf [firstpage_image] =>[orig_patent_app_number] => 945548 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/945548
Time-domain boundary bridge method and apparatus for asynchronous sequential machines Sep 15, 1992 Issued
Array ( [id] => 3438696 [patent_doc_number] => 05404536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-04 [patent_title] => 'Scheduling mechanism for network adapter to minimize latency and guarantee background processing time' [patent_app_type] => 1 [patent_app_number] => 7/945198 [patent_app_country] => US [patent_app_date] => 1992-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3496 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/404/05404536.pdf [firstpage_image] =>[orig_patent_app_number] => 945198 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/945198
Scheduling mechanism for network adapter to minimize latency and guarantee background processing time Sep 14, 1992 Issued
Array ( [id] => 3021907 [patent_doc_number] => 05355502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-11 [patent_title] => 'Low power disk drive clock generator circuit' [patent_app_type] => 1 [patent_app_number] => 7/939051 [patent_app_country] => US [patent_app_date] => 1992-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2478 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/355/05355502.pdf [firstpage_image] =>[orig_patent_app_number] => 939051 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/939051
Low power disk drive clock generator circuit Sep 1, 1992 Issued
Array ( [id] => 3133493 [patent_doc_number] => 05450592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-12 [patent_title] => 'Shared resource control using a deferred operations list' [patent_app_type] => 1 [patent_app_number] => 7/939347 [patent_app_country] => US [patent_app_date] => 1992-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3089 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/450/05450592.pdf [firstpage_image] =>[orig_patent_app_number] => 939347 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/939347
Shared resource control using a deferred operations list Sep 1, 1992 Issued
Array ( [id] => 3427969 [patent_doc_number] => 05394528 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-28 [patent_title] => 'Data processor with bus-sizing function' [patent_app_type] => 1 [patent_app_number] => 7/939257 [patent_app_country] => US [patent_app_date] => 1992-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 9311 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/394/05394528.pdf [firstpage_image] =>[orig_patent_app_number] => 939257 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/939257
Data processor with bus-sizing function Sep 1, 1992 Issued
Array ( [id] => 3487283 [patent_doc_number] => 05428796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-27 [patent_title] => 'System and method for regulating access to direct access storage devices in data processing systems' [patent_app_type] => 1 [patent_app_number] => 7/936151 [patent_app_country] => US [patent_app_date] => 1992-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6229 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/428/05428796.pdf [firstpage_image] =>[orig_patent_app_number] => 936151 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/936151
System and method for regulating access to direct access storage devices in data processing systems Aug 25, 1992 Issued
Array ( [id] => 3041495 [patent_doc_number] => 05317698 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-31 [patent_title] => 'FPGA architecture including direct logic function circuit to I/O interconnections' [patent_app_type] => 1 [patent_app_number] => 7/931717 [patent_app_country] => US [patent_app_date] => 1992-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2803 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 345 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/317/05317698.pdf [firstpage_image] =>[orig_patent_app_number] => 931717 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/931717
FPGA architecture including direct logic function circuit to I/O interconnections Aug 17, 1992 Issued
07/931180 SEPARATELY CLOCKED PROCESSOR SYNCHRONIZATION IMPROVEMENT Aug 16, 1992 Abandoned
Array ( [id] => 3420225 [patent_doc_number] => 05438677 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-01 [patent_title] => 'Mutual exclusion for computer system' [patent_app_type] => 1 [patent_app_number] => 7/931928 [patent_app_country] => US [patent_app_date] => 1992-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/438/05438677.pdf [firstpage_image] =>[orig_patent_app_number] => 931928 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/931928
Mutual exclusion for computer system Aug 16, 1992 Issued
Array ( [id] => 3454140 [patent_doc_number] => 05430848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-04 [patent_title] => 'Distributed arbitration with programmable priorities' [patent_app_type] => 1 [patent_app_number] => 7/929445 [patent_app_country] => US [patent_app_date] => 1992-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6843 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/430/05430848.pdf [firstpage_image] =>[orig_patent_app_number] => 929445 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/929445
Distributed arbitration with programmable priorities Aug 13, 1992 Issued
Array ( [id] => 3126649 [patent_doc_number] => 05414862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-09 [patent_title] => 'Apparatus for controlling a power source' [patent_app_type] => 1 [patent_app_number] => 7/925425 [patent_app_country] => US [patent_app_date] => 1992-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 39 [patent_no_of_words] => 11620 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/414/05414862.pdf [firstpage_image] =>[orig_patent_app_number] => 925425 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/925425
Apparatus for controlling a power source Aug 9, 1992 Issued
Array ( [id] => 3486554 [patent_doc_number] => 05428752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-27 [patent_title] => 'Processor system option module identification system' [patent_app_type] => 1 [patent_app_number] => 7/925707 [patent_app_country] => US [patent_app_date] => 1992-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1680 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/428/05428752.pdf [firstpage_image] =>[orig_patent_app_number] => 925707 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/925707
Processor system option module identification system Aug 3, 1992 Issued
Array ( [id] => 3122014 [patent_doc_number] => 05408618 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-18 [patent_title] => 'Automatic configuration mechanism' [patent_app_type] => 1 [patent_app_number] => 7/924681 [patent_app_country] => US [patent_app_date] => 1992-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6989 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/408/05408618.pdf [firstpage_image] =>[orig_patent_app_number] => 924681 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/924681
Automatic configuration mechanism Jul 30, 1992 Issued
Array ( [id] => 3118457 [patent_doc_number] => 05448743 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-05 [patent_title] => 'General I/O port interrupt mechanism' [patent_app_type] => 1 [patent_app_number] => 7/917497 [patent_app_country] => US [patent_app_date] => 1992-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3890 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/448/05448743.pdf [firstpage_image] =>[orig_patent_app_number] => 917497 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/917497
General I/O port interrupt mechanism Jul 20, 1992 Issued
Array ( [id] => 3015503 [patent_doc_number] => 05371859 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-06 [patent_title] => 'System for providing data communications between a plurality of measurement data generating/receiving modules connected to a common communication bus' [patent_app_type] => 1 [patent_app_number] => 7/910268 [patent_app_country] => US [patent_app_date] => 1992-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 10263 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/371/05371859.pdf [firstpage_image] =>[orig_patent_app_number] => 910268 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/910268
System for providing data communications between a plurality of measurement data generating/receiving modules connected to a common communication bus Jul 19, 1992 Issued
Array ( [id] => 3007281 [patent_doc_number] => 05367646 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-22 [patent_title] => 'Universal device for coupling a computer bus to a controller of a group of peripherals' [patent_app_type] => 1 [patent_app_number] => 7/913477 [patent_app_country] => US [patent_app_date] => 1992-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6738 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/367/05367646.pdf [firstpage_image] =>[orig_patent_app_number] => 913477 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/913477
Universal device for coupling a computer bus to a controller of a group of peripherals Jul 14, 1992 Issued
Array ( [id] => 3454667 [patent_doc_number] => 05430882 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-04 [patent_title] => 'Apparatus and method for protecting data stored in memory' [patent_app_type] => 1 [patent_app_number] => 7/914917 [patent_app_country] => US [patent_app_date] => 1992-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4372 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/430/05430882.pdf [firstpage_image] =>[orig_patent_app_number] => 914917 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/914917
Apparatus and method for protecting data stored in memory Jul 13, 1992 Issued
07/909745 ELECTRONIC APPARATUS Jul 6, 1992 Abandoned
Array ( [id] => 3032573 [patent_doc_number] => 05303354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-12 [patent_title] => 'Data transfer system between registers for microcomputer' [patent_app_type] => 1 [patent_app_number] => 7/909868 [patent_app_country] => US [patent_app_date] => 1992-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2929 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/303/05303354.pdf [firstpage_image] =>[orig_patent_app_number] => 909868 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/909868
Data transfer system between registers for microcomputer Jul 6, 1992 Issued
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