
Glenn Allen Auve
Examiner (ID: 8999)
| Most Active Art Unit | 2111 |
| Art Unit(s) | 2111, 2186, 2308, 2781, 2305, 2175, 2181, 2185 |
| Total Applications | 2279 |
| Issued Applications | 2039 |
| Pending Applications | 51 |
| Abandoned Applications | 199 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10948444
[patent_doc_number] => 20140351465
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-27
[patent_title] => 'Limited Functionality Link State Protocol Node'
[patent_app_type] => utility
[patent_app_number] => 13/900681
[patent_app_country] => US
[patent_app_date] => 2013-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3963
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900681
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/900681 | Limited functionality link state protocol node | May 22, 2013 | Issued |
Array
(
[id] => 9540019
[patent_doc_number] => 20140164666
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-12
[patent_title] => 'SERVER AND METHOD FOR SHARING PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE'
[patent_app_type] => utility
[patent_app_number] => 13/900583
[patent_app_country] => US
[patent_app_date] => 2013-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2067
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900583
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/900583 | SERVER AND METHOD FOR SHARING PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE | May 22, 2013 | Abandoned |
Array
(
[id] => 10917405
[patent_doc_number] => 20140320424
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-30
[patent_title] => 'DATA TRANSMISSION METHOD, TOUCH DATA PROCESSING METHOD AND ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/898484
[patent_app_country] => US
[patent_app_date] => 2013-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2992
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898484
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/898484 | DATA TRANSMISSION METHOD, TOUCH DATA PROCESSING METHOD AND ELECTRONIC DEVICE | May 20, 2013 | Abandoned |
Array
(
[id] => 9220568
[patent_doc_number] => 20140015343
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-16
[patent_title] => 'USB MULTI-ADAPTER'
[patent_app_type] => utility
[patent_app_number] => 13/898404
[patent_app_country] => US
[patent_app_date] => 2013-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1090
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898404
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/898404 | USB MULTI-ADAPTER | May 19, 2013 | Abandoned |
Array
(
[id] => 10556300
[patent_doc_number] => 09280501
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-08
[patent_title] => 'Compatible network node, in particular, for can bus systems'
[patent_app_type] => utility
[patent_app_number] => 13/871043
[patent_app_country] => US
[patent_app_date] => 2013-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3325
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13871043
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/871043 | Compatible network node, in particular, for can bus systems | Apr 25, 2013 | Issued |
Array
(
[id] => 9123669
[patent_doc_number] => 20130290591
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-31
[patent_title] => 'DOCKING STATION FOR COMPUTERIZED BILL PRESENTER SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/870388
[patent_app_country] => US
[patent_app_date] => 2013-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7467
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13870388
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/870388 | DOCKING STATION FOR COMPUTERIZED BILL PRESENTER SYSTEM | Apr 24, 2013 | Abandoned |
Array
(
[id] => 10157654
[patent_doc_number] => 09189435
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-17
[patent_title] => 'Method and apparatus for arbitration with multiple source paths'
[patent_app_type] => utility
[patent_app_number] => 13/868313
[patent_app_country] => US
[patent_app_date] => 2013-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3629
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13868313
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/868313 | Method and apparatus for arbitration with multiple source paths | Apr 22, 2013 | Issued |
Array
(
[id] => 10914308
[patent_doc_number] => 20140317327
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-23
[patent_title] => 'SOFTWARE DEBOUNCING AND NOISE FILTERING MODULES FOR INTERRUPTS'
[patent_app_type] => utility
[patent_app_number] => 13/867094
[patent_app_country] => US
[patent_app_date] => 2013-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4168
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13867094
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/867094 | Software debouncing and noise filtering modules for interrupts | Apr 20, 2013 | Issued |
Array
(
[id] => 9109813
[patent_doc_number] => 20130282945
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-24
[patent_title] => 'APPARATUS AND METHOD EMULATING A PARALLEL INTERFACE TO EFFECT PARALLEL DATA TRANSFER FROM SERIAL FLASH MEMORY'
[patent_app_type] => utility
[patent_app_number] => 13/866128
[patent_app_country] => US
[patent_app_date] => 2013-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3252
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13866128
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/866128 | Apparatus and method emulating a parallel interface to effect parallel data transfer from serial flash memory | Apr 18, 2013 | Issued |
Array
(
[id] => 10536305
[patent_doc_number] => 09261933
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-16
[patent_title] => 'Integrating energy budgets for power management'
[patent_app_type] => utility
[patent_app_number] => 13/858804
[patent_app_country] => US
[patent_app_date] => 2013-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7728
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13858804
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/858804 | Integrating energy budgets for power management | Apr 7, 2013 | Issued |
Array
(
[id] => 10173052
[patent_doc_number] => 09203772
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-01
[patent_title] => 'Managing multiple cartridges that are electrically coupled together'
[patent_app_type] => utility
[patent_app_number] => 13/855986
[patent_app_country] => US
[patent_app_date] => 2013-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 5014
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13855986
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/855986 | Managing multiple cartridges that are electrically coupled together | Apr 2, 2013 | Issued |
Array
(
[id] => 9006089
[patent_doc_number] => 20130227214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-29
[patent_title] => 'Chip Having Register to Store Value that Represents Adjustment to Reference Voltage'
[patent_app_type] => utility
[patent_app_number] => 13/853978
[patent_app_country] => US
[patent_app_date] => 2013-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 12997
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13853978
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/853978 | Chip having register to store value that represents adjustment to reference voltage | Mar 28, 2013 | Issued |
Array
(
[id] => 9578745
[patent_doc_number] => 08769181
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-01
[patent_title] => 'Multi-port system and method for routing a data element within an interconnection fabric'
[patent_app_type] => utility
[patent_app_number] => 13/846515
[patent_app_country] => US
[patent_app_date] => 2013-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 11154
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13846515
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/846515 | Multi-port system and method for routing a data element within an interconnection fabric | Mar 17, 2013 | Issued |
Array
(
[id] => 9437301
[patent_doc_number] => 20140115208
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-24
[patent_title] => 'CONTROL MESSAGING IN MULTISLOT LINK LAYER FLIT'
[patent_app_type] => utility
[patent_app_number] => 13/976966
[patent_app_country] => US
[patent_app_date] => 2013-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 14588
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976966
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/976966 | Control messaging in multislot link layer flit | Mar 14, 2013 | Issued |
Array
(
[id] => 10188890
[patent_doc_number] => 09218310
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-22
[patent_title] => 'Shared input/output (I/O) unit'
[patent_app_type] => utility
[patent_app_number] => 13/835000
[patent_app_country] => US
[patent_app_date] => 2013-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5161
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835000
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/835000 | Shared input/output (I/O) unit | Mar 14, 2013 | Issued |
Array
(
[id] => 11186631
[patent_doc_number] => 09418035
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-08-16
[patent_title] => 'High performance interconnect physical layer'
[patent_app_type] => utility
[patent_app_number] => 13/976960
[patent_app_country] => US
[patent_app_date] => 2013-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 22359
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976960
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/976960 | High performance interconnect physical layer | Mar 14, 2013 | Issued |
Array
(
[id] => 9758733
[patent_doc_number] => 20140289434
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-25
[patent_title] => 'Leveraging an Enumeration and/or Configuration Mechanism of One Interconnect Protocol for a Different Interconnect Protocol'
[patent_app_type] => utility
[patent_app_number] => 13/976548
[patent_app_country] => US
[patent_app_date] => 2013-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 15013
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976548
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/976548 | Leveraging an enumeration and/or configuration mechanism of one interconnect protocol for a different interconnect protocol | Feb 27, 2013 | Issued |
Array
(
[id] => 9688113
[patent_doc_number] => 20140244878
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'Methods And Systems For Address Mapping Between Host And Expansion Devices Within System-In-Package (SiP) Solutions'
[patent_app_type] => utility
[patent_app_number] => 13/775313
[patent_app_country] => US
[patent_app_date] => 2013-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8757
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13775313
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/775313 | Methods and systems for address mapping between host and expansion devices within system-in-package (SiP) solutions | Feb 24, 2013 | Issued |
Array
(
[id] => 9688108
[patent_doc_number] => 20140244873
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'Methods And Systems For Interconnecting Host And Expansion Devices Within System-In-Package (SiP) Solutions'
[patent_app_type] => utility
[patent_app_number] => 13/775330
[patent_app_country] => US
[patent_app_date] => 2013-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8968
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13775330
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/775330 | Methods and systems for interconnecting host and expansion devices within system-in-package (SiP) solutions | Feb 24, 2013 | Issued |
Array
(
[id] => 9688103
[patent_doc_number] => 20140244869
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'Dual Mode USB and Serial Console Port'
[patent_app_type] => utility
[patent_app_number] => 13/774713
[patent_app_country] => US
[patent_app_date] => 2013-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4242
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13774713
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/774713 | Dual mode USB and serial console port | Feb 21, 2013 | Issued |