Search

Glenn Allen Auve

Examiner (ID: 8999)

Most Active Art Unit
2111
Art Unit(s)
2111, 2186, 2308, 2781, 2305, 2175, 2181, 2185
Total Applications
2279
Issued Applications
2039
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8917988 [patent_doc_number] => 20130179613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'NETWORK ON CHIP (NOC) WITH QOS FEATURES' [patent_app_type] => utility [patent_app_number] => 13/680965 [patent_app_country] => US [patent_app_date] => 2012-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5465 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13680965 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/680965
NETWORK ON CHIP (NOC) WITH QOS FEATURES Nov 18, 2012 Abandoned
Array ( [id] => 8735232 [patent_doc_number] => 20130080801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'COMPUTER SYSTEM FOR SUPPLYING ELECTRIC POWER TO EXTERNAL APPARATUS AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/680695 [patent_app_country] => US [patent_app_date] => 2012-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4975 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13680695 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/680695
Computer system for supplying electric power to external apparatus and control method thereof Nov 18, 2012 Issued
Array ( [id] => 9479287 [patent_doc_number] => 20140136750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'OPERATING M-PHY BASED COMMUNICATIONS OVER SERIAL ADVANCED TECHNOLOGY ATTACHMENT (SATA)-BASED INTERFACE, AND RELATED CABLES, CONNECTORS, SYSTEMS AND METHODS' [patent_app_type] => utility [patent_app_number] => 13/678461 [patent_app_country] => US [patent_app_date] => 2012-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13678461 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/678461
Operating M-PHY based communications over serial advanced technology attachment (SATA)-based interface, and related cables, connectors, systems and methods Nov 14, 2012 Issued
Array ( [id] => 8823721 [patent_doc_number] => 20130124765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'SIGNAL TRANSFER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/674380 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 21450 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674380 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674380
Signal transfer circuit for offsetting signal delay Nov 11, 2012 Issued
Array ( [id] => 10009727 [patent_doc_number] => 09053249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Removable memory cartridge and docking station compatible with media drive expansion slots' [patent_app_type] => utility [patent_app_number] => 13/672290 [patent_app_country] => US [patent_app_date] => 2012-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 10228 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13672290 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/672290
Removable memory cartridge and docking station compatible with media drive expansion slots Nov 7, 2012 Issued
Array ( [id] => 8709968 [patent_doc_number] => 20130067257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'Power Managed Lock Optimization' [patent_app_type] => utility [patent_app_number] => 13/669890 [patent_app_country] => US [patent_app_date] => 2012-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13669890 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/669890
Power managed lock optimization Nov 5, 2012 Issued
Array ( [id] => 8698974 [patent_doc_number] => 20130060982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'INFORMATION PROCESSING SYSTEM AND METHOD OF CONTROLLING HARDWARE OF THE INFORMATION PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/669895 [patent_app_country] => US [patent_app_date] => 2012-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13669895 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/669895
INFORMATION PROCESSING SYSTEM AND METHOD OF CONTROLLING HARDWARE OF THE INFORMATION PROCESSING SYSTEM Nov 5, 2012 Abandoned
Array ( [id] => 9947453 [patent_doc_number] => 08996781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Integrated storage/processing devices, systems and methods for performing big data analytics' [patent_app_type] => utility [patent_app_number] => 13/669727 [patent_app_country] => US [patent_app_date] => 2012-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8986 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13669727 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/669727
Integrated storage/processing devices, systems and methods for performing big data analytics Nov 5, 2012 Issued
Array ( [id] => 10969624 [patent_doc_number] => 20140372656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'DATA PROCESSING DEVICE, SEMICONDUCTOR EXTERNAL VIEW INSPECTION DEVICE, AND DATA VOLUME INCREASE ALLEVIATION METHOD' [patent_app_type] => utility [patent_app_number] => 14/364371 [patent_app_country] => US [patent_app_date] => 2012-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9412 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14364371 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/364371
Data processing device, semiconductor external view inspection device, and data volume increase alleviation method Oct 31, 2012 Issued
Array ( [id] => 8697444 [patent_doc_number] => 20130059453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 13/666435 [patent_app_country] => US [patent_app_date] => 2012-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2802 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13666435 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/666435
Integrated circuits for accessing USB device Oct 31, 2012 Issued
Array ( [id] => 9123668 [patent_doc_number] => 20130290590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'CONNECTOR ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 13/663583 [patent_app_country] => US [patent_app_date] => 2012-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 953 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13663583 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/663583
CONNECTOR ASSEMBLY Oct 29, 2012 Abandoned
Array ( [id] => 10041200 [patent_doc_number] => 09081907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Operating M-PHY based communications over peripheral component interconnect (PCI)-based interfaces, and related cables, connectors, systems and methods' [patent_app_type] => utility [patent_app_number] => 13/662999 [patent_app_country] => US [patent_app_date] => 2012-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9094 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13662999 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/662999
Operating M-PHY based communications over peripheral component interconnect (PCI)-based interfaces, and related cables, connectors, systems and methods Oct 28, 2012 Issued
Array ( [id] => 8794118 [patent_doc_number] => 20130111087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'METHOD AND A BUS DEVICE FOR TRANSMITTING SAFETY-ORIENTED DATA' [patent_app_type] => utility [patent_app_number] => 13/661698 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2251 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13661698 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/661698
Method and a bus device for transmitting safety-oriented data Oct 25, 2012 Issued
Array ( [id] => 9451590 [patent_doc_number] => 20140122760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'COMMUNICATION OF MESSAGE SIGNALLED INTERRUPTS' [patent_app_type] => utility [patent_app_number] => 13/661456 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4508 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13661456 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/661456
Communication of message signalled interrupts Oct 25, 2012 Issued
Array ( [id] => 10841117 [patent_doc_number] => 08868815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'Information processing device and method' [patent_app_type] => utility [patent_app_number] => 13/661130 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5720 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13661130 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/661130
Information processing device and method Oct 25, 2012 Issued
Array ( [id] => 9974136 [patent_doc_number] => 09021173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'High speed differential wiring strategy for serially attached SCSI systems' [patent_app_type] => utility [patent_app_number] => 13/661391 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4631 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13661391 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/661391
High speed differential wiring strategy for serially attached SCSI systems Oct 25, 2012 Issued
Array ( [id] => 10854061 [patent_doc_number] => 08880771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Method and apparatus for securing and segregating host to host messaging on PCIe fabric' [patent_app_type] => utility [patent_app_number] => 13/660791 [patent_app_country] => US [patent_app_date] => 2012-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4169 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13660791 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/660791
Method and apparatus for securing and segregating host to host messaging on PCIe fabric Oct 24, 2012 Issued
Array ( [id] => 9940641 [patent_doc_number] => 08990472 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Methods and systems for running network protocols over peripheral component interconnect express' [patent_app_type] => utility [patent_app_number] => 13/658976 [patent_app_country] => US [patent_app_date] => 2012-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3657 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13658976 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/658976
Methods and systems for running network protocols over peripheral component interconnect express Oct 23, 2012 Issued
Array ( [id] => 8781894 [patent_doc_number] => 20130103869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'BUS CONNECTION CIRCUIT, SEMICONDUCTOR DEVICE AND OPERATION METHOD OF BUS CONNECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/659183 [patent_app_country] => US [patent_app_date] => 2012-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11662 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13659183 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/659183
Bus connection circuit, semiconductor device and operation method of bus connection circuit for making procedure for switching between a 1-cycle transfer and a 2-cycle transfer unnecessary Oct 23, 2012 Issued
Array ( [id] => 9891520 [patent_doc_number] => 08977795 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-10 [patent_title] => 'Method and apparatus for preventing multiple threads of a processor from accessing, in parallel, predetermined sections of source code' [patent_app_type] => utility [patent_app_number] => 13/658177 [patent_app_country] => US [patent_app_date] => 2012-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3949 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13658177 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/658177
Method and apparatus for preventing multiple threads of a processor from accessing, in parallel, predetermined sections of source code Oct 22, 2012 Issued
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