Search

Glenn Allen Auve

Examiner (ID: 8999)

Most Active Art Unit
2111
Art Unit(s)
2111, 2186, 2308, 2781, 2305, 2175, 2181, 2185
Total Applications
2279
Issued Applications
2039
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9410102 [patent_doc_number] => 20140101354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-10 [patent_title] => 'MEMORY ACCESS CONTROL MODULE AND ASSOCIATED METHODS' [patent_app_type] => utility [patent_app_number] => 13/647971 [patent_app_country] => US [patent_app_date] => 2012-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13647971 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/647971
Memory access control module and associated methods Oct 8, 2012 Issued
Array ( [id] => 9410100 [patent_doc_number] => 20140101352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-10 [patent_title] => 'INTERRUPT CONTROLLER, APPARATUS INCLUDING INTERRUPT CONTROLLER, AND CORRESPONDING METHODS FOR PROCESSING INTERRUPT REQUEST EVENT(S) IN SYSTEM INCLUDING PROCESSOR(S)' [patent_app_type] => utility [patent_app_number] => 13/647365 [patent_app_country] => US [patent_app_date] => 2012-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8755 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13647365 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/647365
Interrupt controller, apparatus including interrupt controller, and corresponding methods for processing interrupt request event(s) in system including processor(s) Oct 7, 2012 Issued
Array ( [id] => 9083178 [patent_doc_number] => 20130268708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'MOTHERBOARD TEST DEVICE AND CONNECTION MODULE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/646823 [patent_app_country] => US [patent_app_date] => 2012-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1470 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646823 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/646823
MOTHERBOARD TEST DEVICE AND CONNECTION MODULE THEREOF Oct 7, 2012 Abandoned
Array ( [id] => 9410106 [patent_doc_number] => 20140101358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-10 [patent_title] => 'BYTE SELECTION AND STEERING LOGIC FOR COMBINED BYTE SHIFT AND BYTE PERMUTE VECTOR UNIT' [patent_app_type] => utility [patent_app_number] => 13/646974 [patent_app_country] => US [patent_app_date] => 2012-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3872 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646974 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/646974
Byte selection and steering logic for combined byte shift and byte permute vector unit Oct 7, 2012 Issued
Array ( [id] => 8757009 [patent_doc_number] => 20130091314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'Field Bus Network Adapter and Field Bus Network Subscriber with Field Bus Connections' [patent_app_type] => utility [patent_app_number] => 13/646826 [patent_app_country] => US [patent_app_date] => 2012-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2820 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646826 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/646826
Field bus network adapter and field bus network subscriber with field bus connections Oct 7, 2012 Issued
Array ( [id] => 9940633 [patent_doc_number] => 08990464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Methods for discovery, configuration, and coordinating data communications between master and slave devices in a communication system' [patent_app_type] => utility [patent_app_number] => 13/646382 [patent_app_country] => US [patent_app_date] => 2012-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 98 [patent_no_of_words] => 19422 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646382 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/646382
Methods for discovery, configuration, and coordinating data communications between master and slave devices in a communication system Oct 4, 2012 Issued
Array ( [id] => 9871476 [patent_doc_number] => 08959268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Information processing apparatus, serial communication system, method of initialization of communication therefor and serial communication apparatus' [patent_app_type] => utility [patent_app_number] => 13/646103 [patent_app_country] => US [patent_app_date] => 2012-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7408 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646103 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/646103
Information processing apparatus, serial communication system, method of initialization of communication therefor and serial communication apparatus Oct 4, 2012 Issued
Array ( [id] => 10885438 [patent_doc_number] => 08909841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Configurable serial interface' [patent_app_type] => utility [patent_app_number] => 13/645322 [patent_app_country] => US [patent_app_date] => 2012-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5065 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13645322 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/645322
Configurable serial interface Oct 3, 2012 Issued
Array ( [id] => 10052376 [patent_doc_number] => 09092255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Multi-core processor system, computer product, and control method for interrupt execution' [patent_app_type] => utility [patent_app_number] => 13/628709 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6366 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628709 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628709
Multi-core processor system, computer product, and control method for interrupt execution Sep 26, 2012 Issued
Array ( [id] => 10052376 [patent_doc_number] => 09092255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Multi-core processor system, computer product, and control method for interrupt execution' [patent_app_type] => utility [patent_app_number] => 13/628709 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6366 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628709 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628709
Multi-core processor system, computer product, and control method for interrupt execution Sep 26, 2012 Issued
Array ( [id] => 10105647 [patent_doc_number] => 09141429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Multicore processor system, computer product, and control method' [patent_app_type] => utility [patent_app_number] => 13/624353 [patent_app_country] => US [patent_app_date] => 2012-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6810 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13624353 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/624353
Multicore processor system, computer product, and control method Sep 20, 2012 Issued
Array ( [id] => 10052394 [patent_doc_number] => 09092273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Multicore processor system, computer product, and control method' [patent_app_type] => utility [patent_app_number] => 13/614097 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9434 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614097 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/614097
Multicore processor system, computer product, and control method Sep 12, 2012 Issued
Array ( [id] => 10072374 [patent_doc_number] => 09110733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Multi-core processor system, arbiter circuit control method, and computer product' [patent_app_type] => utility [patent_app_number] => 13/613634 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 10729 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13613634 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/613634
Multi-core processor system, arbiter circuit control method, and computer product Sep 12, 2012 Issued
Array ( [id] => 9332479 [patent_doc_number] => 20140059261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'NOVEL LOCK LEASING METHOD FOR SOLVING DEADLOCK' [patent_app_type] => utility [patent_app_number] => 13/592282 [patent_app_country] => US [patent_app_date] => 2012-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5753 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592282 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/592282
Lock leasing method for solving deadlock Aug 21, 2012 Issued
Array ( [id] => 9049191 [patent_doc_number] => 08543749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'System and method of increasing data processing on a diagnostic tool' [patent_app_type] => utility [patent_app_number] => 13/590932 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2926 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590932 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590932
System and method of increasing data processing on a diagnostic tool Aug 20, 2012 Issued
Array ( [id] => 9926215 [patent_doc_number] => 08984200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Task scheduling in big and little cores' [patent_app_type] => utility [patent_app_number] => 13/590484 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4890 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590484 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590484
Task scheduling in big and little cores Aug 20, 2012 Issued
Array ( [id] => 8517920 [patent_doc_number] => 20120317328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/590936 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590936 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590936
Scalable distributed memory and I/O multiprocessor system Aug 20, 2012 Issued
Array ( [id] => 9282841 [patent_doc_number] => 20140032809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'COMPOSITE DATA TRANSMISSION INTERFACE AND A JUDGMENT METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/590391 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3104 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590391 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590391
Composite data transmission interface and a judgment method thereof Aug 20, 2012 Issued
Array ( [id] => 9150435 [patent_doc_number] => 20130304958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'System and Method for Processing Device with Differentiated Execution Mode' [patent_app_type] => utility [patent_app_number] => 13/590017 [patent_app_country] => US [patent_app_date] => 2012-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7535 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590017 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590017
System and method for processing device with differentiated execution mode Aug 19, 2012 Issued
Array ( [id] => 9320543 [patent_doc_number] => 20140052881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'SYSTEMS AND METHODS FOR CONCATENATING MULTIPLE DEVICES' [patent_app_type] => utility [patent_app_number] => 13/589839 [patent_app_country] => US [patent_app_date] => 2012-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589839 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/589839
Systems and methods for concatenating multiple devices Aug 19, 2012 Issued
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