
Glenn Allen Auve
Examiner (ID: 8999)
| Most Active Art Unit | 2111 |
| Art Unit(s) | 2111, 2186, 2308, 2781, 2305, 2175, 2181, 2185 |
| Total Applications | 2279 |
| Issued Applications | 2039 |
| Pending Applications | 51 |
| Abandoned Applications | 199 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9171929
[patent_doc_number] => 20130313914
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-28
[patent_title] => 'CONTROL CIRCUIT FOR UNIVERSAL SERIAL BUS CONNECTOR'
[patent_app_type] => utility
[patent_app_number] => 13/589241
[patent_app_country] => US
[patent_app_date] => 2012-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 910
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589241
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/589241 | CONTROL CIRCUIT FOR UNIVERSAL SERIAL BUS CONNECTOR | Aug 19, 2012 | Abandoned |
Array
(
[id] => 9320544
[patent_doc_number] => 20140052882
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-20
[patent_title] => 'Latency Sensitive Software Interrupt and Thread Scheduling'
[patent_app_type] => utility
[patent_app_number] => 13/587737
[patent_app_country] => US
[patent_app_date] => 2012-08-16
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/587737 | Latency sensitive software interrupt and thread scheduling | Aug 15, 2012 | Issued |
Array
(
[id] => 9967757
[patent_doc_number] => 09015392
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[patent_kind] => B2
[patent_issue_date] => 2015-04-21
[patent_title] => 'Multi-chip package and operating method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/572086
[patent_app_country] => US
[patent_app_date] => 2012-08-10
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/572086 | Multi-chip package and operating method thereof | Aug 9, 2012 | Issued |
Array
(
[id] => 11680385
[patent_doc_number] => 09678917
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-13
[patent_title] => 'Communications assembly having logic multichannel communication via a physical transmission path for serial interchip data transmission'
[patent_app_type] => utility
[patent_app_number] => 14/346943
[patent_app_country] => US
[patent_app_date] => 2012-08-06
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/346943 | Communications assembly having logic multichannel communication via a physical transmission path for serial interchip data transmission | Aug 5, 2012 | Issued |
Array
(
[id] => 8703772
[patent_doc_number] => 08397007
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[patent_issue_date] => 2013-03-12
[patent_title] => 'Interrupt moderation'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/549863 | Interrupt moderation | Jul 15, 2012 | Issued |
Array
(
[id] => 8485022
[patent_doc_number] => 20120284429
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[patent_kind] => A1
[patent_issue_date] => 2012-11-08
[patent_title] => 'Dynamic Address Change for Slave Devices on a Shared Bus'
[patent_app_type] => utility
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[patent_app_date] => 2012-07-16
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/550579 | Dynamic address change for slave devices on a shared bus | Jul 15, 2012 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/549863 | Interrupt moderation | Jul 15, 2012 | Issued |
Array
(
[id] => 9665754
[patent_doc_number] => 08812762
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-19
[patent_title] => 'Presence detectable baffle for electrical components in a computing system'
[patent_app_type] => utility
[patent_app_number] => 13/534255
[patent_app_country] => US
[patent_app_date] => 2012-06-27
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13534255
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/534255 | Presence detectable baffle for electrical components in a computing system | Jun 26, 2012 | Issued |
Array
(
[id] => 8463030
[patent_doc_number] => 20120268199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-25
[patent_title] => 'Chip Having Register to Store Value that Represents Adjustment to Reference Voltage'
[patent_app_type] => utility
[patent_app_number] => 13/535228
[patent_app_country] => US
[patent_app_date] => 2012-06-27
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/535228 | Chip having register to store value that represents adjustment to reference voltage | Jun 26, 2012 | Issued |
Array
(
[id] => 8843227
[patent_doc_number] => 20130138855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-30
[patent_title] => 'STORAGE DEVICE WITH HOT-SPARE DISK, METHOD FOR STORAGE DEVICE DISK REPLACEMENT, AND DATA TRANSMISSION METHOD FOR DISK REPLACEMENT'
[patent_app_type] => utility
[patent_app_number] => 13/532798
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13532798
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/532798 | STORAGE DEVICE WITH HOT-SPARE DISK, METHOD FOR STORAGE DEVICE DISK REPLACEMENT, AND DATA TRANSMISSION METHOD FOR DISK REPLACEMENT | Jun 25, 2012 | Abandoned |
Array
(
[id] => 9264727
[patent_doc_number] => 20130346656
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-26
[patent_title] => 'Providing A Serial Protocol For A Bidirectional Serial Interconnect'
[patent_app_type] => utility
[patent_app_number] => 13/532962
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/532962 | Providing a serial protocol for a bidirectional serial interconnect | Jun 25, 2012 | Issued |
Array
(
[id] => 10901372
[patent_doc_number] => 08924614
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[patent_issue_date] => 2014-12-30
[patent_title] => 'Host controller apparatus, information processing apparatus, and event information output method'
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[patent_app_number] => 13/532296
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/532296 | Host controller apparatus, information processing apparatus, and event information output method | Jun 24, 2012 | Issued |
Array
(
[id] => 9714261
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[patent_title] => 'Methods and apparatuses for trace multicast across a bus structure, and related systems'
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Array
(
[id] => 10879282
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[patent_title] => 'Tunneling platform management messages through inter-processor interconnects'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/532085 | Tunneling platform management messages through inter-processor interconnects | Jun 24, 2012 | Issued |
Array
(
[id] => 9264731
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[patent_issue_date] => 2013-12-26
[patent_title] => 'USB DEVICE CONTROL USING ENDPOINT TYPE DETECTION DURING ENUMERATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/532730 | USB device control using endpoint type detection during enumeration | Jun 24, 2012 | Issued |
Array
(
[id] => 9714269
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/531370 | Multi-protocol data bus interface | Jun 21, 2012 | Issued |
Array
(
[id] => 8698973
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[patent_title] => 'Administering Computing System Resources In A Computing System'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/529217 | Administering computing system resources in a computing system | Jun 20, 2012 | Issued |
Array
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Array
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Array
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[patent_title] => 'METHOD FOR MANAGING A PROCESSOR, LOCK CONTENTION MANAGEMENT APPARATUS, AND COMPUTER SYSTEM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/489202 | Method for managing a processor, lock contention management apparatus, and computer system | Jun 4, 2012 | Issued |