Search

Glenn Allen Auve

Examiner (ID: 8999)

Most Active Art Unit
2111
Art Unit(s)
2111, 2186, 2308, 2781, 2305, 2175, 2181, 2185
Total Applications
2279
Issued Applications
2039
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10569295 [patent_doc_number] => 09292465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Dynamic link width adjustment' [patent_app_type] => utility [patent_app_number] => 13/993106 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4911 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13993106 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/993106
Dynamic link width adjustment Dec 20, 2011 Issued
Array ( [id] => 8254703 [patent_doc_number] => 20120159022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'INTEGRATION OF FIELD DEVICES IN A DISTRIBUTED SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/332839 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2463 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20120159022.pdf [firstpage_image] =>[orig_patent_app_number] => 13332839 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/332839
Integration of field devices in a distributed system Dec 20, 2011 Issued
Array ( [id] => 8790467 [patent_doc_number] => 20130107436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'POWER SUPPLY UNIT AND POWER SUPPLY SYSTEM FOR SERVERS' [patent_app_type] => utility [patent_app_number] => 13/332546 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2844 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13332546 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/332546
POWER SUPPLY UNIT AND POWER SUPPLY SYSTEM FOR SERVERS Dec 20, 2011 Abandoned
Array ( [id] => 8893619 [patent_doc_number] => 20130166803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'DEQUEUE OPERATION USING MASK VECTOR TO MANAGE INPUT/OUTPUT INTERRUPTIONS' [patent_app_type] => utility [patent_app_number] => 13/332427 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13332427 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/332427
Dequeue operation using mask vector to manage input/output interruptions Dec 20, 2011 Issued
Array ( [id] => 9623320 [patent_doc_number] => 08793516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-29 [patent_title] => 'Power supply unit and power supply system for servers' [patent_app_type] => utility [patent_app_number] => 13/332514 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2393 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13332514 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/332514
Power supply unit and power supply system for servers Dec 20, 2011 Issued
Array ( [id] => 8886392 [patent_doc_number] => 20130159576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'METHOD AND APPARATUS FOR CONTROLLING SYSTEM INTERRUPTS' [patent_app_type] => utility [patent_app_number] => 13/330066 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3653 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330066 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/330066
Method and apparatus for controlling system interrupts Dec 18, 2011 Issued
Array ( [id] => 10885437 [patent_doc_number] => 08909840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Data bus inversion coding' [patent_app_type] => utility [patent_app_number] => 13/330482 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330482 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/330482
Data bus inversion coding Dec 18, 2011 Issued
Array ( [id] => 8267274 [patent_doc_number] => 20120166702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'ELECTRONIC APPARATUS, METHOD FOR CONTROLLING ELECTRONIC APPARATUS, TRANSMISSION APPARATUS, AND RECEPTION APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/329766 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 15389 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13329766 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/329766
Method, apparatus and cable for enabling two types of HDMI communication Dec 18, 2011 Issued
Array ( [id] => 9314844 [patent_doc_number] => 08656079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Method and apparatus for remapping interrupt types' [patent_app_type] => utility [patent_app_number] => 13/330244 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4314 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330244 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/330244
Method and apparatus for remapping interrupt types Dec 18, 2011 Issued
Array ( [id] => 8383218 [patent_doc_number] => 20120226837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'Method and System of debugging Multicore Bus Transaction Problems' [patent_app_type] => utility [patent_app_number] => 13/329261 [patent_app_country] => US [patent_app_date] => 2011-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7067 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13329261 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/329261
Method and system of debugging multicore bus transaction problems Dec 16, 2011 Issued
Array ( [id] => 10616685 [patent_doc_number] => 09336130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Methods, systems, and computer readable media for providing basic input/output system (BIOS) data and non-BIOS data on the same non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/308117 [patent_app_country] => US [patent_app_date] => 2011-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4481 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13308117 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/308117
Methods, systems, and computer readable media for providing basic input/output system (BIOS) data and non-BIOS data on the same non-volatile memory Nov 29, 2011 Issued
Array ( [id] => 8574662 [patent_doc_number] => 08341323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Method and apparatus for data movement in a system on a chip' [patent_app_type] => utility [patent_app_number] => 13/302854 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2582 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13302854 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/302854
Method and apparatus for data movement in a system on a chip Nov 21, 2011 Issued
Array ( [id] => 8971755 [patent_doc_number] => 08510584 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-13 [patent_title] => 'Ultra low power sleep mode' [patent_app_type] => utility [patent_app_number] => 13/296977 [patent_app_country] => US [patent_app_date] => 2011-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13296977 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/296977
Ultra low power sleep mode Nov 14, 2011 Issued
Array ( [id] => 10651247 [patent_doc_number] => 09367500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Apparatus for multiple bus master engines to share the same request channel to a pipelined backbone' [patent_app_type] => utility [patent_app_number] => 13/997623 [patent_app_country] => US [patent_app_date] => 2011-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8304 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13997623 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/997623
Apparatus for multiple bus master engines to share the same request channel to a pipelined backbone Nov 8, 2011 Issued
Array ( [id] => 11775223 [patent_doc_number] => 09384154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Method to emulate message signaled interrupts with multiple interrupt vectors' [patent_app_type] => utility [patent_app_number] => 13/976195 [patent_app_country] => US [patent_app_date] => 2011-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8020 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976195 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/976195
Method to emulate message signaled interrupts with multiple interrupt vectors Nov 2, 2011 Issued
Array ( [id] => 9571469 [patent_doc_number] => 20140189182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'METHOD TO ACCELERATE MESSAGE SIGNALED INTERRUPT PROCESSING' [patent_app_type] => utility [patent_app_number] => 13/976213 [patent_app_country] => US [patent_app_date] => 2011-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6465 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976213 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/976213
Method to accelerate message signaled interrupt processing Nov 2, 2011 Issued
Array ( [id] => 7780549 [patent_doc_number] => 20120042105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'BUS ARBITRATION APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/279974 [patent_app_country] => US [patent_app_date] => 2011-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5511 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20120042105.pdf [firstpage_image] =>[orig_patent_app_number] => 13279974 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/279974
BUS ARBITRATION APPARATUS Oct 23, 2011 Abandoned
Array ( [id] => 8143479 [patent_doc_number] => 20120096287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'COORDINATED APPROACH BETWEEN MIDDLEWARE APPLICATION AND SUB-SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/271490 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3243 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20120096287.pdf [firstpage_image] =>[orig_patent_app_number] => 13271490 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271490
Coordinated approach between middleware application and sub-systems Oct 11, 2011 Issued
Array ( [id] => 8769407 [patent_doc_number] => 20130097444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'USING LATCHED EVENTS TO MANAGE SLEEP/WAKE SEQUENCES ON COMPUTER SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/271409 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5425 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13271409 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271409
Using latched events to manage sleep/wake sequences on computer systems Oct 11, 2011 Issued
Array ( [id] => 8143503 [patent_doc_number] => 20120096299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'UNIVERSAL SERIAL BUS DONGLE AND METHOD OF CONTROLLING POWER THEREOF' [patent_app_type] => utility [patent_app_number] => 13/271623 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3391 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20120096299.pdf [firstpage_image] =>[orig_patent_app_number] => 13271623 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271623
UNIVERSAL SERIAL BUS DONGLE AND METHOD OF CONTROLLING POWER THEREOF Oct 11, 2011 Abandoned
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