Search

Glenn Allen Auve

Examiner (ID: 8999)

Most Active Art Unit
2111
Art Unit(s)
2111, 2186, 2308, 2781, 2305, 2175, 2181, 2185
Total Applications
2279
Issued Applications
2039
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9444205 [patent_doc_number] => 08713340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Method and apparatus for power management control of an embedded memory having sleep and shutdown features' [patent_app_type] => utility [patent_app_number] => 13/271640 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 27 [patent_no_of_words] => 12258 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13271640 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271640
Method and apparatus for power management control of an embedded memory having sleep and shutdown features Oct 11, 2011 Issued
Array ( [id] => 8757070 [patent_doc_number] => 20130091375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'Advanced Array Local Clock Buffer Base Block Circuit' [patent_app_type] => utility [patent_app_number] => 13/269654 [patent_app_country] => US [patent_app_date] => 2011-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4867 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13269654 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/269654
Advanced Array Local Clock Buffer Base Block Circuit Oct 9, 2011 Abandoned
Array ( [id] => 8280031 [patent_doc_number] => 20120173911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'METHOD AND SYSTEM FOR DETECTING WHETHER A COMPUTER SERVER HAS SHUT DOWN GRACEFULLY' [patent_app_type] => utility [patent_app_number] => 13/269867 [patent_app_country] => US [patent_app_date] => 2011-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3173 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13269867 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/269867
Method and system for detecting whether a computer server has shut down gracefully Oct 9, 2011 Issued
Array ( [id] => 8722659 [patent_doc_number] => 20130073876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'NETWORK WAKE UP SYSTEM WITH PROTECTION FUNCTION' [patent_app_type] => utility [patent_app_number] => 13/267856 [patent_app_country] => US [patent_app_date] => 2011-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 885 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13267856 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/267856
Network wake up system with protection function Oct 5, 2011 Issued
Array ( [id] => 7739217 [patent_doc_number] => 20120019069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'COMPUTER SYSTEM AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/250033 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5974 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20120019069.pdf [firstpage_image] =>[orig_patent_app_number] => 13250033 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/250033
Computer system for supplying electric power to external apparatus and control method thereof Sep 29, 2011 Issued
Array ( [id] => 10171103 [patent_doc_number] => 09201812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Multiple logical representations of audio functions in a wireless audio transmitter that transmits audio data at different data rates' [patent_app_type] => utility [patent_app_number] => 13/247975 [patent_app_country] => US [patent_app_date] => 2011-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6499 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13247975 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/247975
Multiple logical representations of audio functions in a wireless audio transmitter that transmits audio data at different data rates Sep 27, 2011 Issued
Array ( [id] => 8058839 [patent_doc_number] => 20120079147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'BUS CONTROL DEVICE' [patent_app_type] => utility [patent_app_number] => 13/247163 [patent_app_country] => US [patent_app_date] => 2011-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14190 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079147.pdf [firstpage_image] =>[orig_patent_app_number] => 13247163 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/247163
Bus controller arranged between a bus master and a networked communication bus in order to control the transmission route of a packet that flows through the communication bus, and simulation program to design such a bus controller Sep 27, 2011 Issued
Array ( [id] => 9102607 [patent_doc_number] => 08566501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Circuit for simultaneously analyzing performance and bugs and method thereof' [patent_app_type] => utility [patent_app_number] => 13/233008 [patent_app_country] => US [patent_app_date] => 2011-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1800 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233008 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/233008
Circuit for simultaneously analyzing performance and bugs and method thereof Sep 13, 2011 Issued
Array ( [id] => 8709845 [patent_doc_number] => 20130067134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'PSEUDO MULTI-MASTER I2C OPERATION IN A BLADE SERVER CHASSIS' [patent_app_type] => utility [patent_app_number] => 13/231040 [patent_app_country] => US [patent_app_date] => 2011-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5852 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13231040 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/231040
Pseudo multi-master I2C operation in a blade server chassis Sep 12, 2011 Issued
Array ( [id] => 9458452 [patent_doc_number] => 08719476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Communication system, master device and slave device, and communication method, configured to handle plural concurrent requests' [patent_app_type] => utility [patent_app_number] => 13/231128 [patent_app_country] => US [patent_app_date] => 2011-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6515 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13231128 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/231128
Communication system, master device and slave device, and communication method, configured to handle plural concurrent requests Sep 12, 2011 Issued
Array ( [id] => 9077376 [patent_doc_number] => 08554969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Electronic device with expansion card' [patent_app_type] => utility [patent_app_number] => 13/228450 [patent_app_country] => US [patent_app_date] => 2011-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 723 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13228450 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/228450
Electronic device with expansion card Sep 8, 2011 Issued
Array ( [id] => 9752196 [patent_doc_number] => 08843685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-23 [patent_title] => 'Presence detectable baffle for electrical components in a computing system' [patent_app_type] => utility [patent_app_number] => 13/226035 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8787 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226035 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/226035
Presence detectable baffle for electrical components in a computing system Sep 5, 2011 Issued
Array ( [id] => 8698975 [patent_doc_number] => 20130060984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'Administering Computing System Resources In A Computing System' [patent_app_type] => utility [patent_app_number] => 13/226134 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8823 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226134 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/226134
Administering computing system resources in a computing system Sep 5, 2011 Issued
Array ( [id] => 7671387 [patent_doc_number] => 20110320656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'Techniques for obtaining a serial number for a storage device' [patent_app_type] => utility [patent_app_number] => 13/225519 [patent_app_country] => US [patent_app_date] => 2011-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2669 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13225519 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/225519
Techniques for obtaining a serial number for a storage device Sep 4, 2011 Abandoned
Array ( [id] => 10854055 [patent_doc_number] => 08880764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Pessimistic interrupt affinity for devices' [patent_app_type] => utility [patent_app_number] => 13/221590 [patent_app_country] => US [patent_app_date] => 2011-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7746 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13221590 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/221590
Pessimistic interrupt affinity for devices Aug 29, 2011 Issued
Array ( [id] => 9257691 [patent_doc_number] => 08621131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Uniform multi-chip identification and routing system' [patent_app_type] => utility [patent_app_number] => 13/221465 [patent_app_country] => US [patent_app_date] => 2011-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6194 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13221465 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/221465
Uniform multi-chip identification and routing system Aug 29, 2011 Issued
Array ( [id] => 9257676 [patent_doc_number] => 08621116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Dynamic address change optimizations' [patent_app_type] => utility [patent_app_number] => 13/218658 [patent_app_country] => US [patent_app_date] => 2011-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13218658 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/218658
Dynamic address change optimizations Aug 25, 2011 Issued
Array ( [id] => 7658372 [patent_doc_number] => 20110307641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-15 [patent_title] => 'Lazy Handling of End of Interrupt Messages in a Virtualized Environment' [patent_app_type] => utility [patent_app_number] => 13/216584 [patent_app_country] => US [patent_app_date] => 2011-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0307/20110307641.pdf [firstpage_image] =>[orig_patent_app_number] => 13216584 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/216584
Lazy handling of end of interrupt messages in a virtualized environment Aug 23, 2011 Issued
Array ( [id] => 8213801 [patent_doc_number] => 20120131255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'MULTI-PORT SYSTEM AND METHOD FOR ROUTING A DATA ELEMENT WITHIN AN INTERCONNECTION FABRIC' [patent_app_type] => utility [patent_app_number] => 13/215011 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11054 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20120131255.pdf [firstpage_image] =>[orig_patent_app_number] => 13215011 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/215011
Multi-port system and method for routing a data element within an interconnection fabric Aug 21, 2011 Issued
Array ( [id] => 9242180 [patent_doc_number] => 08606985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Controlled device to control switching between transmission paths for transmitting data at different rate' [patent_app_type] => utility [patent_app_number] => 13/198329 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7965 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13198329 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198329
Controlled device to control switching between transmission paths for transmitting data at different rate Aug 3, 2011 Issued
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