Search

Glenn Allen Auve

Examiner (ID: 3740, Phone: (571)272-3623 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2181, 2186, 2308, 2111, 2185, 2175, 2781, 2305
Total Applications
2279
Issued Applications
2041
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9077376 [patent_doc_number] => 08554969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Electronic device with expansion card' [patent_app_type] => utility [patent_app_number] => 13/228450 [patent_app_country] => US [patent_app_date] => 2011-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 723 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13228450 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/228450
Electronic device with expansion card Sep 8, 2011 Issued
Array ( [id] => 8698975 [patent_doc_number] => 20130060984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'Administering Computing System Resources In A Computing System' [patent_app_type] => utility [patent_app_number] => 13/226134 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8823 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226134 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/226134
Administering computing system resources in a computing system Sep 5, 2011 Issued
Array ( [id] => 9752196 [patent_doc_number] => 08843685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-23 [patent_title] => 'Presence detectable baffle for electrical components in a computing system' [patent_app_type] => utility [patent_app_number] => 13/226035 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8787 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226035 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/226035
Presence detectable baffle for electrical components in a computing system Sep 5, 2011 Issued
Array ( [id] => 7671387 [patent_doc_number] => 20110320656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'Techniques for obtaining a serial number for a storage device' [patent_app_type] => utility [patent_app_number] => 13/225519 [patent_app_country] => US [patent_app_date] => 2011-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2669 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13225519 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/225519
Techniques for obtaining a serial number for a storage device Sep 4, 2011 Abandoned
Array ( [id] => 9257691 [patent_doc_number] => 08621131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Uniform multi-chip identification and routing system' [patent_app_type] => utility [patent_app_number] => 13/221465 [patent_app_country] => US [patent_app_date] => 2011-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6194 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13221465 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/221465
Uniform multi-chip identification and routing system Aug 29, 2011 Issued
Array ( [id] => 10854055 [patent_doc_number] => 08880764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Pessimistic interrupt affinity for devices' [patent_app_type] => utility [patent_app_number] => 13/221590 [patent_app_country] => US [patent_app_date] => 2011-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7746 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13221590 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/221590
Pessimistic interrupt affinity for devices Aug 29, 2011 Issued
Array ( [id] => 9257676 [patent_doc_number] => 08621116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Dynamic address change optimizations' [patent_app_type] => utility [patent_app_number] => 13/218658 [patent_app_country] => US [patent_app_date] => 2011-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13218658 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/218658
Dynamic address change optimizations Aug 25, 2011 Issued
Array ( [id] => 7658372 [patent_doc_number] => 20110307641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-15 [patent_title] => 'Lazy Handling of End of Interrupt Messages in a Virtualized Environment' [patent_app_type] => utility [patent_app_number] => 13/216584 [patent_app_country] => US [patent_app_date] => 2011-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0307/20110307641.pdf [firstpage_image] =>[orig_patent_app_number] => 13216584 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/216584
Lazy handling of end of interrupt messages in a virtualized environment Aug 23, 2011 Issued
Array ( [id] => 8213801 [patent_doc_number] => 20120131255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'MULTI-PORT SYSTEM AND METHOD FOR ROUTING A DATA ELEMENT WITHIN AN INTERCONNECTION FABRIC' [patent_app_type] => utility [patent_app_number] => 13/215011 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11054 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20120131255.pdf [firstpage_image] =>[orig_patent_app_number] => 13215011 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/215011
Multi-port system and method for routing a data element within an interconnection fabric Aug 21, 2011 Issued
Array ( [id] => 9242180 [patent_doc_number] => 08606985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Controlled device to control switching between transmission paths for transmitting data at different rate' [patent_app_type] => utility [patent_app_number] => 13/198329 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7965 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13198329 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198329
Controlled device to control switching between transmission paths for transmitting data at different rate Aug 3, 2011 Issued
Array ( [id] => 8985037 [patent_doc_number] => 08516167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Microcontroller system bus scheduling for multiport slave modules' [patent_app_type] => utility [patent_app_number] => 13/197547 [patent_app_country] => US [patent_app_date] => 2011-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 7 [patent_no_of_words] => 7878 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13197547 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/197547
Microcontroller system bus scheduling for multiport slave modules Aug 2, 2011 Issued
Array ( [id] => 8193875 [patent_doc_number] => 20120119854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SEGMENTED TRANSMISSION SIGNAL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/196572 [patent_app_country] => US [patent_app_date] => 2011-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3777 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119854.pdf [firstpage_image] =>[orig_patent_app_number] => 13196572 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/196572
SEGMENTED TRANSMISSION SIGNAL CIRCUIT Aug 1, 2011 Abandoned
Array ( [id] => 7569182 [patent_doc_number] => 20110289245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'Memory Controller and Method Utilizing Equalization Co-Efficient Setting' [patent_app_type] => utility [patent_app_number] => 13/196840 [patent_app_country] => US [patent_app_date] => 2011-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12955 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20110289245.pdf [firstpage_image] =>[orig_patent_app_number] => 13196840 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/196840
Memory controller and method utilizing equalization co-efficient setting Aug 1, 2011 Issued
Array ( [id] => 7770298 [patent_doc_number] => 20120036306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'SWITCHING CIRCUIT, INFORMATION PROCESSING APPARATUS, AND SWITCHING CIRCUIT CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 13/195345 [patent_app_country] => US [patent_app_date] => 2011-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10360 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20120036306.pdf [firstpage_image] =>[orig_patent_app_number] => 13195345 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/195345
Switching circuit connected to an I/O device, and switching circuit connected to an I/O device control method Jul 31, 2011 Issued
13/195357 Apparatus For Providing I/O Support To A Computer System And Method Of Use Thereof Jul 31, 2011 Abandoned
Array ( [id] => 9012368 [patent_doc_number] => 08527687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Main board and method for dynamically configuring periperhal component interconnect express ports thereof' [patent_app_type] => utility [patent_app_number] => 13/194572 [patent_app_country] => US [patent_app_date] => 2011-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2071 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13194572 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/194572
Main board and method for dynamically configuring periperhal component interconnect express ports thereof Jul 28, 2011 Issued
Array ( [id] => 7757707 [patent_doc_number] => 20120029304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'CONFIGURABLE PATIENT MONITORING SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/192006 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 15435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20120029304.pdf [firstpage_image] =>[orig_patent_app_number] => 13192006 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/192006
Configurable patient monitoring system Jul 26, 2011 Issued
Array ( [id] => 9248362 [patent_doc_number] => 08612663 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-17 [patent_title] => 'Integrated circuit devices, systems and methods having automatic configurable mapping of input and/or output data connections' [patent_app_type] => utility [patent_app_number] => 13/192381 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 8095 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13192381 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/192381
Integrated circuit devices, systems and methods having automatic configurable mapping of input and/or output data connections Jul 26, 2011 Issued
Array ( [id] => 8639487 [patent_doc_number] => 20130031290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'System and Method for Implementing a Secure Processor Data Bus' [patent_app_type] => utility [patent_app_number] => 13/191845 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2694 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13191845 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/191845
System and method for implementing a secure processor data bus Jul 26, 2011 Issued
Array ( [id] => 8639485 [patent_doc_number] => 20130031288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'PCI-E SYSTEM HAVING RECONFIGURABLE LINK ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 13/191892 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4477 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13191892 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/191892
PCI-E system having reconfigurable link architecture Jul 26, 2011 Issued
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