Search

Glenn Allen Auve

Examiner (ID: 8999)

Most Active Art Unit
2111
Art Unit(s)
2111, 2186, 2308, 2781, 2305, 2175, 2181, 2185
Total Applications
2279
Issued Applications
2039
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8985037 [patent_doc_number] => 08516167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Microcontroller system bus scheduling for multiport slave modules' [patent_app_type] => utility [patent_app_number] => 13/197547 [patent_app_country] => US [patent_app_date] => 2011-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 7 [patent_no_of_words] => 7878 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13197547 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/197547
Microcontroller system bus scheduling for multiport slave modules Aug 2, 2011 Issued
Array ( [id] => 8193875 [patent_doc_number] => 20120119854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SEGMENTED TRANSMISSION SIGNAL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/196572 [patent_app_country] => US [patent_app_date] => 2011-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3777 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119854.pdf [firstpage_image] =>[orig_patent_app_number] => 13196572 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/196572
SEGMENTED TRANSMISSION SIGNAL CIRCUIT Aug 1, 2011 Abandoned
Array ( [id] => 7569182 [patent_doc_number] => 20110289245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'Memory Controller and Method Utilizing Equalization Co-Efficient Setting' [patent_app_type] => utility [patent_app_number] => 13/196840 [patent_app_country] => US [patent_app_date] => 2011-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12955 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20110289245.pdf [firstpage_image] =>[orig_patent_app_number] => 13196840 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/196840
Memory controller and method utilizing equalization co-efficient setting Aug 1, 2011 Issued
Array ( [id] => 7770298 [patent_doc_number] => 20120036306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'SWITCHING CIRCUIT, INFORMATION PROCESSING APPARATUS, AND SWITCHING CIRCUIT CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 13/195345 [patent_app_country] => US [patent_app_date] => 2011-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10360 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20120036306.pdf [firstpage_image] =>[orig_patent_app_number] => 13195345 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/195345
Switching circuit connected to an I/O device, and switching circuit connected to an I/O device control method Jul 31, 2011 Issued
13/195357 Apparatus For Providing I/O Support To A Computer System And Method Of Use Thereof Jul 31, 2011 Abandoned
Array ( [id] => 9012368 [patent_doc_number] => 08527687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Main board and method for dynamically configuring periperhal component interconnect express ports thereof' [patent_app_type] => utility [patent_app_number] => 13/194572 [patent_app_country] => US [patent_app_date] => 2011-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2071 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13194572 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/194572
Main board and method for dynamically configuring periperhal component interconnect express ports thereof Jul 28, 2011 Issued
Array ( [id] => 7757707 [patent_doc_number] => 20120029304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'CONFIGURABLE PATIENT MONITORING SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/192006 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 15435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20120029304.pdf [firstpage_image] =>[orig_patent_app_number] => 13192006 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/192006
Configurable patient monitoring system Jul 26, 2011 Issued
Array ( [id] => 9248362 [patent_doc_number] => 08612663 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-17 [patent_title] => 'Integrated circuit devices, systems and methods having automatic configurable mapping of input and/or output data connections' [patent_app_type] => utility [patent_app_number] => 13/192381 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 8095 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13192381 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/192381
Integrated circuit devices, systems and methods having automatic configurable mapping of input and/or output data connections Jul 26, 2011 Issued
Array ( [id] => 8639487 [patent_doc_number] => 20130031290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'System and Method for Implementing a Secure Processor Data Bus' [patent_app_type] => utility [patent_app_number] => 13/191845 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2694 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13191845 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/191845
System and method for implementing a secure processor data bus Jul 26, 2011 Issued
Array ( [id] => 9049194 [patent_doc_number] => 08543752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'Peripheral component interconnect express interface card with a switch' [patent_app_type] => utility [patent_app_number] => 13/191457 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1847 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13191457 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/191457
Peripheral component interconnect express interface card with a switch Jul 26, 2011 Issued
Array ( [id] => 8639485 [patent_doc_number] => 20130031288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'PCI-E SYSTEM HAVING RECONFIGURABLE LINK ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 13/191892 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4477 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13191892 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/191892
PCI-E system having reconfigurable link architecture Jul 26, 2011 Issued
Array ( [id] => 8229970 [patent_doc_number] => 20120144180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-07 [patent_title] => 'BASEBOARD MANAGEMENT CONTROLLER AND METHOD FOR SHARING SERIAL PORT' [patent_app_type] => utility [patent_app_number] => 13/172860 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1440 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13172860 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/172860
Baseboard management controller and method for sharing serial port Jun 29, 2011 Issued
Array ( [id] => 8716142 [patent_doc_number] => 08402293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Power management in electronic systems' [patent_app_type] => utility [patent_app_number] => 13/171157 [patent_app_country] => US [patent_app_date] => 2011-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4434 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13171157 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/171157
Power management in electronic systems Jun 27, 2011 Issued
Array ( [id] => 9472273 [patent_doc_number] => 08725919 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-05-13 [patent_title] => 'Device configuration for multiprocessor systems' [patent_app_type] => utility [patent_app_number] => 13/164319 [patent_app_country] => US [patent_app_date] => 2011-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4114 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13164319 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/164319
Device configuration for multiprocessor systems Jun 19, 2011 Issued
Array ( [id] => 6093782 [patent_doc_number] => 20110219156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'BUS ARBITRATION APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/112938 [patent_app_country] => US [patent_app_date] => 2011-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10380 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20110219156.pdf [firstpage_image] =>[orig_patent_app_number] => 13112938 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/112938
Bus arbitration apparatus and method May 19, 2011 Issued
Array ( [id] => 5960714 [patent_doc_number] => 20110185101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/076041 [patent_app_country] => US [patent_app_date] => 2011-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4757 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20110185101.pdf [firstpage_image] =>[orig_patent_app_number] => 13076041 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/076041
Scalable distributed memory and I/O multiprocessor system Mar 29, 2011 Issued
Array ( [id] => 7493110 [patent_doc_number] => 20110239026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'POWER EFFICIENT WAY OF OPERATING MOTION SENSORS' [patent_app_type] => utility [patent_app_number] => 13/073621 [patent_app_country] => US [patent_app_date] => 2011-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6786 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20110239026.pdf [firstpage_image] =>[orig_patent_app_number] => 13073621 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/073621
Power efficient way of operating motion sensors Mar 27, 2011 Issued
Array ( [id] => 9089301 [patent_doc_number] => 08560748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Information processing system including interrupt processing function' [patent_app_type] => utility [patent_app_number] => 13/070154 [patent_app_country] => US [patent_app_date] => 2011-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7353 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13070154 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/070154
Information processing system including interrupt processing function Mar 22, 2011 Issued
Array ( [id] => 8279908 [patent_doc_number] => 20120173782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'METHOD AND SYSTEM FOR MANAGING SLEEP STATES OF INTERRUPT CONTROLLERS IN A PORTABLE COMPUTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/069087 [patent_app_country] => US [patent_app_date] => 2011-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5968 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13069087 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/069087
Method and system for managing sleep states of interrupt controllers in a portable computing device Mar 21, 2011 Issued
Array ( [id] => 9077377 [patent_doc_number] => 08554968 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-08 [patent_title] => 'Interrupt technique for a nonvolatile memory controller' [patent_app_type] => utility [patent_app_number] => 13/052388 [patent_app_country] => US [patent_app_date] => 2011-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 16683 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13052388 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/052388
Interrupt technique for a nonvolatile memory controller Mar 20, 2011 Issued
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