Search

Glenn Allen Auve

Examiner (ID: 3740, Phone: (571)272-3623 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2181, 2186, 2308, 2111, 2185, 2175, 2781, 2305
Total Applications
2279
Issued Applications
2041
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5528884 [patent_doc_number] => 20090198961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'Cross-Thread Interrupt Controller for a Multi-thread Processor' [patent_app_type] => utility [patent_app_number] => 12/024804 [patent_app_country] => US [patent_app_date] => 2008-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2848 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20090198961.pdf [firstpage_image] =>[orig_patent_app_number] => 12024804 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/024804
Cross-thread interrupt controller for a multi-thread processor Jan 31, 2008 Issued
Array ( [id] => 8259941 [patent_doc_number] => 08209455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Control and/or data-transmission module' [patent_app_type] => utility [patent_app_number] => 12/525693 [patent_app_country] => US [patent_app_date] => 2008-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3560 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12525693 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/525693
Control and/or data-transmission module Jan 31, 2008 Issued
Array ( [id] => 175549 [patent_doc_number] => 07660932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-09 [patent_title] => 'Composing on-chip interconnects with configurable interfaces' [patent_app_type] => utility [patent_app_number] => 12/022912 [patent_app_country] => US [patent_app_date] => 2008-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7623 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/660/07660932.pdf [firstpage_image] =>[orig_patent_app_number] => 12022912 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/022912
Composing on-chip interconnects with configurable interfaces Jan 29, 2008 Issued
Array ( [id] => 5381329 [patent_doc_number] => 20090193168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'INTERRUPT MITIGATION ON MULTIPLE NETWORK ADAPTERS' [patent_app_type] => utility [patent_app_number] => 12/021949 [patent_app_country] => US [patent_app_date] => 2008-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4408 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20090193168.pdf [firstpage_image] =>[orig_patent_app_number] => 12021949 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/021949
Interrupt mitigation on multiple network adapters Jan 28, 2008 Issued
Array ( [id] => 213296 [patent_doc_number] => 07624215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Interrupt controller' [patent_app_type] => utility [patent_app_number] => 12/010401 [patent_app_country] => US [patent_app_date] => 2008-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5034 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/624/07624215.pdf [firstpage_image] =>[orig_patent_app_number] => 12010401 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/010401
Interrupt controller Jan 23, 2008 Issued
Array ( [id] => 4844798 [patent_doc_number] => 20080181206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'I2C BUS CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/018651 [patent_app_country] => US [patent_app_date] => 2008-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4820 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20080181206.pdf [firstpage_image] =>[orig_patent_app_number] => 12018651 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/018651
I2C bus control circuit Jan 22, 2008 Issued
Array ( [id] => 9012361 [patent_doc_number] => 08527680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'USB portable device having switching function' [patent_app_type] => utility [patent_app_number] => 12/863233 [patent_app_country] => US [patent_app_date] => 2008-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5979 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12863233 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/863233
USB portable device having switching function Jan 15, 2008 Issued
Array ( [id] => 231351 [patent_doc_number] => 07603508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-13 [patent_title] => 'Scalable distributed memory and I/O multiprocessor systems and associated methods' [patent_app_type] => utility [patent_app_number] => 12/013595 [patent_app_country] => US [patent_app_date] => 2008-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4711 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/603/07603508.pdf [firstpage_image] =>[orig_patent_app_number] => 12013595 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/013595
Scalable distributed memory and I/O multiprocessor systems and associated methods Jan 13, 2008 Issued
Array ( [id] => 188358 [patent_doc_number] => 07650448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-19 [patent_title] => 'I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures' [patent_app_type] => utility [patent_app_number] => 12/008543 [patent_app_country] => US [patent_app_date] => 2008-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 8675 [patent_no_of_claims] => 78 [patent_no_of_ind_claims] => 21 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/650/07650448.pdf [firstpage_image] =>[orig_patent_app_number] => 12008543 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/008543
I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures Jan 9, 2008 Issued
Array ( [id] => 7686479 [patent_doc_number] => 20090177812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-09 [patent_title] => 'Synchronous Bus Controller System' [patent_app_type] => utility [patent_app_number] => 11/969351 [patent_app_country] => US [patent_app_date] => 2008-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20090177812.pdf [firstpage_image] =>[orig_patent_app_number] => 11969351 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/969351
Synchronous bus controller system Jan 3, 2008 Issued
Array ( [id] => 4766818 [patent_doc_number] => 20080178030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRIC POWER SUPPLY CONTROLLING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/968848 [patent_app_country] => US [patent_app_date] => 2008-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20080178030.pdf [firstpage_image] =>[orig_patent_app_number] => 11968848 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/968848
Semiconductor integrated circuit and electric power supply controlling method thereof Jan 2, 2008 Issued
Array ( [id] => 4754693 [patent_doc_number] => 20080162769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'Systems and Methods for Improving Data Transfer between Devices' [patent_app_type] => utility [patent_app_number] => 11/967086 [patent_app_country] => US [patent_app_date] => 2007-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2884 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20080162769.pdf [firstpage_image] =>[orig_patent_app_number] => 11967086 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/967086
Systems and methods for improving data transfer between devices Dec 28, 2007 Issued
Array ( [id] => 5437845 [patent_doc_number] => 20090172432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'Power management in electronic systems' [patent_app_type] => utility [patent_app_number] => 12/006064 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20090172432.pdf [firstpage_image] =>[orig_patent_app_number] => 12006064 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/006064
Power management in electronic systems Dec 27, 2007 Issued
Array ( [id] => 166587 [patent_doc_number] => 07673085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Multi-channel communication circuit' [patent_app_type] => utility [patent_app_number] => 11/965766 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1369 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/673/07673085.pdf [firstpage_image] =>[orig_patent_app_number] => 11965766 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965766
Multi-channel communication circuit Dec 27, 2007 Issued
Array ( [id] => 7542918 [patent_doc_number] => 08060767 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-11-15 [patent_title] => 'Ultra low power sleep mode' [patent_app_type] => utility [patent_app_number] => 12/005950 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5619 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/060/08060767.pdf [firstpage_image] =>[orig_patent_app_number] => 12005950 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/005950
Ultra low power sleep mode Dec 27, 2007 Issued
Array ( [id] => 47667 [patent_doc_number] => 07783818 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-08-24 [patent_title] => 'Modularized interconnect between root complexes and I/O modules' [patent_app_type] => utility [patent_app_number] => 11/965841 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5870 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/783/07783818.pdf [firstpage_image] =>[orig_patent_app_number] => 11965841 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965841
Modularized interconnect between root complexes and I/O modules Dec 27, 2007 Issued
Array ( [id] => 248781 [patent_doc_number] => 07587541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-08 [patent_title] => 'Master-slave device communication circuit' [patent_app_type] => utility [patent_app_number] => 11/965746 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1282 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/587/07587541.pdf [firstpage_image] =>[orig_patent_app_number] => 11965746 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965746
Master-slave device communication circuit Dec 27, 2007 Issued
Array ( [id] => 208400 [patent_doc_number] => 07631129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-08 [patent_title] => 'Computer monitoring system and monitoring method' [patent_app_type] => utility [patent_app_number] => 11/962118 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1151 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/631/07631129.pdf [firstpage_image] =>[orig_patent_app_number] => 11962118 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/962118
Computer monitoring system and monitoring method Dec 20, 2007 Issued
Array ( [id] => 4847511 [patent_doc_number] => 20080183919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'Simple Bus Buffer' [patent_app_type] => utility [patent_app_number] => 11/960152 [patent_app_country] => US [patent_app_date] => 2007-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9662 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20080183919.pdf [firstpage_image] =>[orig_patent_app_number] => 11960152 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/960152
Simple bus buffer Dec 18, 2007 Issued
Array ( [id] => 5424130 [patent_doc_number] => 20090150586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'Optimizing clock crossing and data path latency' [patent_app_type] => utility [patent_app_number] => 11/999929 [patent_app_country] => US [patent_app_date] => 2007-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2435 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20090150586.pdf [firstpage_image] =>[orig_patent_app_number] => 11999929 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/999929
Optimizing clock crossing and data path latency Dec 6, 2007 Issued
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