Search

Glenn Allen Auve

Examiner (ID: 3740, Phone: (571)272-3623 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2181, 2186, 2308, 2111, 2185, 2175, 2781, 2305
Total Applications
2279
Issued Applications
2041
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6941019 [patent_doc_number] => 20050114582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Method and apparatus for accelerating detection of serial bus device speed signals' [patent_app_type] => utility [patent_app_number] => 11/021338 [patent_app_country] => US [patent_app_date] => 2004-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3643 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20050114582.pdf [firstpage_image] =>[orig_patent_app_number] => 11021338 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/021338
Method and apparatus for accelerating detection of serial bus device speed signals Dec 20, 2004 Issued
Array ( [id] => 6919769 [patent_doc_number] => 20050097256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Arbitration technique based on processor task priority' [patent_app_type] => utility [patent_app_number] => 11/014493 [patent_app_country] => US [patent_app_date] => 2004-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2850 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20050097256.pdf [firstpage_image] =>[orig_patent_app_number] => 11014493 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/014493
Arbitration technique based on processor task priority Dec 15, 2004 Abandoned
Array ( [id] => 518143 [patent_doc_number] => 07203783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Electrical host system with expandable optical disk recording and playing device' [patent_app_type] => utility [patent_app_number] => 10/999981 [patent_app_country] => US [patent_app_date] => 2004-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2280 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203783.pdf [firstpage_image] =>[orig_patent_app_number] => 10999981 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/999981
Electrical host system with expandable optical disk recording and playing device Nov 30, 2004 Issued
Array ( [id] => 539263 [patent_doc_number] => 07188203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Method and apparatus for dynamic suppression of spurious interrupts' [patent_app_type] => utility [patent_app_number] => 10/994993 [patent_app_country] => US [patent_app_date] => 2004-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6422 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/188/07188203.pdf [firstpage_image] =>[orig_patent_app_number] => 10994993 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/994993
Method and apparatus for dynamic suppression of spurious interrupts Nov 21, 2004 Issued
Array ( [id] => 7102790 [patent_doc_number] => 20050105516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Switch with transparent and non-transparent ports' [patent_app_type] => utility [patent_app_number] => 10/993277 [patent_app_country] => US [patent_app_date] => 2004-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2382 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20050105516.pdf [firstpage_image] =>[orig_patent_app_number] => 10993277 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/993277
Switch with transparent and non-transparent ports Nov 17, 2004 Issued
Array ( [id] => 6962069 [patent_doc_number] => 20050216636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Evaluation chip' [patent_app_type] => utility [patent_app_number] => 10/989025 [patent_app_country] => US [patent_app_date] => 2004-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6217 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20050216636.pdf [firstpage_image] =>[orig_patent_app_number] => 10989025 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/989025
Evaluation chip Nov 15, 2004 Issued
Array ( [id] => 645483 [patent_doc_number] => 07124229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-17 [patent_title] => 'Method and apparatus for improved performance for priority agent requests when symmetric agent bus parking is enabled' [patent_app_type] => utility [patent_app_number] => 10/980737 [patent_app_country] => US [patent_app_date] => 2004-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4495 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/124/07124229.pdf [firstpage_image] =>[orig_patent_app_number] => 10980737 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/980737
Method and apparatus for improved performance for priority agent requests when symmetric agent bus parking is enabled Nov 1, 2004 Issued
Array ( [id] => 998993 [patent_doc_number] => 06915371 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-07-05 [patent_title] => 'Tunnel device for an input/output node of a computer system' [patent_app_type] => utility [patent_app_number] => 10/964883 [patent_app_country] => US [patent_app_date] => 2004-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8079 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/915/06915371.pdf [firstpage_image] =>[orig_patent_app_number] => 10964883 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/964883
Tunnel device for an input/output node of a computer system Oct 13, 2004 Issued
Array ( [id] => 7166678 [patent_doc_number] => 20050086404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'Method and apparatus for scheduling a resource to meet quality-of-service restrictions' [patent_app_type] => utility [patent_app_number] => 10/963271 [patent_app_country] => US [patent_app_date] => 2004-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2707 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20050086404.pdf [firstpage_image] =>[orig_patent_app_number] => 10963271 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/963271
Method and apparatus for scheduling a resource to meet quality-of-service restrictions Oct 10, 2004 Issued
Array ( [id] => 7245168 [patent_doc_number] => 20050080959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'Multi-port system and method for routing a data element within an interconnection fabric' [patent_app_type] => utility [patent_app_number] => 10/945615 [patent_app_country] => US [patent_app_date] => 2004-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11047 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20050080959.pdf [firstpage_image] =>[orig_patent_app_number] => 10945615 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/945615
Interconnection fabric enumeration Sep 20, 2004 Issued
Array ( [id] => 5709362 [patent_doc_number] => 20060050707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Methods and apparatus for multiple bit rate serial communication' [patent_app_type] => utility [patent_app_number] => 10/936556 [patent_app_country] => US [patent_app_date] => 2004-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5358 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20060050707.pdf [firstpage_image] =>[orig_patent_app_number] => 10936556 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/936556
Methods and apparatus for multiple bit rate serial communication Sep 8, 2004 Issued
Array ( [id] => 897846 [patent_doc_number] => 07346726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-18 [patent_title] => 'Integrated circuit with dynamic communication service selection' [patent_app_type] => utility [patent_app_number] => 10/566552 [patent_app_country] => US [patent_app_date] => 2004-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4956 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/346/07346726.pdf [firstpage_image] =>[orig_patent_app_number] => 10566552 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/566552
Integrated circuit with dynamic communication service selection Jul 20, 2004 Issued
Array ( [id] => 7266376 [patent_doc_number] => 20040243756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'USB device for decreasing the current at load' [patent_app_type] => new [patent_app_number] => 10/885117 [patent_app_country] => US [patent_app_date] => 2004-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2986 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20040243756.pdf [firstpage_image] =>[orig_patent_app_number] => 10885117 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/885117
USB device for decreasing the current at load Jul 6, 2004 Abandoned
Array ( [id] => 325026 [patent_doc_number] => 07519751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-14 [patent_title] => 'Method of generating an enable signal of a standard memory core and relative memory device' [patent_app_type] => utility [patent_app_number] => 10/886003 [patent_app_country] => US [patent_app_date] => 2004-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3025 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/519/07519751.pdf [firstpage_image] =>[orig_patent_app_number] => 10886003 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/886003
Method of generating an enable signal of a standard memory core and relative memory device Jul 6, 2004 Issued
Array ( [id] => 609426 [patent_doc_number] => 07155547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-26 [patent_title] => 'Integrally embedded backplane data device and method' [patent_app_type] => utility [patent_app_number] => 10/884417 [patent_app_country] => US [patent_app_date] => 2004-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4654 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/155/07155547.pdf [firstpage_image] =>[orig_patent_app_number] => 10884417 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/884417
Integrally embedded backplane data device and method Jul 1, 2004 Issued
Array ( [id] => 6913920 [patent_doc_number] => 20050177678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-11 [patent_title] => 'Expansion device for storage units' [patent_app_type] => utility [patent_app_number] => 10/884157 [patent_app_country] => US [patent_app_date] => 2004-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2088 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20050177678.pdf [firstpage_image] =>[orig_patent_app_number] => 10884157 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/884157
Expansion device for storage units Jul 1, 2004 Issued
Array ( [id] => 609444 [patent_doc_number] => 07155556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-26 [patent_title] => 'Devices and methods for converting remote device formats to host device formats for access to host associated resources' [patent_app_type] => utility [patent_app_number] => 10/883943 [patent_app_country] => US [patent_app_date] => 2004-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6460 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/155/07155556.pdf [firstpage_image] =>[orig_patent_app_number] => 10883943 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883943
Devices and methods for converting remote device formats to host device formats for access to host associated resources Jul 1, 2004 Issued
Array ( [id] => 787590 [patent_doc_number] => 06990543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Memory module with improved data bus performance' [patent_app_type] => utility [patent_app_number] => 10/883488 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6470 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/990/06990543.pdf [firstpage_image] =>[orig_patent_app_number] => 10883488 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883488
Memory module with improved data bus performance Jun 30, 2004 Issued
Array ( [id] => 725846 [patent_doc_number] => 07051130 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-23 [patent_title] => 'Integrated circuit device that stores a value representative of a drive strength setting' [patent_app_type] => utility [patent_app_number] => 10/882879 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 32 [patent_no_of_words] => 12577 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/051/07051130.pdf [firstpage_image] =>[orig_patent_app_number] => 10882879 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882879
Integrated circuit device that stores a value representative of a drive strength setting Jun 29, 2004 Issued
Array ( [id] => 5893874 [patent_doc_number] => 20060002412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Methods and apparatus for supporting programmable burst management schemes on pipelined buses' [patent_app_type] => utility [patent_app_number] => 10/882375 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7691 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20060002412.pdf [firstpage_image] =>[orig_patent_app_number] => 10882375 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882375
Methods and apparatus for supporting programmable burst management schemes on pipelined buses Jun 29, 2004 Issued
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