Search

Glenn Allen Auve

Examiner (ID: 3740, Phone: (571)272-3623 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2181, 2186, 2308, 2111, 2185, 2175, 2781, 2305
Total Applications
2279
Issued Applications
2041
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6348789 [patent_doc_number] => 20020035659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-21 [patent_title] => 'Switching system' [patent_app_type] => new [patent_app_number] => 09/866749 [patent_app_country] => US [patent_app_date] => 2001-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2734 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20020035659.pdf [firstpage_image] =>[orig_patent_app_number] => 09866749 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/866749
Switching system May 29, 2001 Abandoned
Array ( [id] => 695200 [patent_doc_number] => 07076595 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-11 [patent_title] => 'Programmable logic device including programmable interface core and central processing unit' [patent_app_type] => utility [patent_app_number] => 09/861112 [patent_app_country] => US [patent_app_date] => 2001-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 24157 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/076/07076595.pdf [firstpage_image] =>[orig_patent_app_number] => 09861112 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/861112
Programmable logic device including programmable interface core and central processing unit May 17, 2001 Issued
Array ( [id] => 5887529 [patent_doc_number] => 20020012401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-31 [patent_title] => 'Transducer network bus' [patent_app_type] => new [patent_app_number] => 09/859798 [patent_app_country] => US [patent_app_date] => 2001-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4827 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20020012401.pdf [firstpage_image] =>[orig_patent_app_number] => 09859798 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/859798
Transducer network bus May 16, 2001 Abandoned
Array ( [id] => 1595826 [patent_doc_number] => 06484225 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-19 [patent_title] => 'Method and system for managing communications among computer devices' [patent_app_type] => B2 [patent_app_number] => 09/854236 [patent_app_country] => US [patent_app_date] => 2001-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3614 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/484/06484225.pdf [firstpage_image] =>[orig_patent_app_number] => 09854236 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/854236
Method and system for managing communications among computer devices May 10, 2001 Issued
Array ( [id] => 6051376 [patent_doc_number] => 20020169913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => ' System and method of switching a hot-pluggable peripheral device' [patent_app_type] => new [patent_app_number] => 09/852981 [patent_app_country] => US [patent_app_date] => 2001-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3193 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20020169913.pdf [firstpage_image] =>[orig_patent_app_number] => 09852981 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/852981
System and method of switching a hot-pluggable peripheral device May 9, 2001 Abandoned
Array ( [id] => 1186642 [patent_doc_number] => 06738849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-18 [patent_title] => 'Real-time communications for speeding up packet transmission' [patent_app_type] => B2 [patent_app_number] => 09/842279 [patent_app_country] => US [patent_app_date] => 2001-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4917 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738849.pdf [firstpage_image] =>[orig_patent_app_number] => 09842279 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/842279
Real-time communications for speeding up packet transmission Apr 23, 2001 Issued
Array ( [id] => 1169714 [patent_doc_number] => 06766398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Method for processing PCI interrupt signals in a logically partitioned guest operating system' [patent_app_type] => B2 [patent_app_number] => 09/836687 [patent_app_country] => US [patent_app_date] => 2001-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 17444 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/766/06766398.pdf [firstpage_image] =>[orig_patent_app_number] => 09836687 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/836687
Method for processing PCI interrupt signals in a logically partitioned guest operating system Apr 16, 2001 Issued
Array ( [id] => 6894522 [patent_doc_number] => 20010016888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgment' [patent_app_type] => new [patent_app_number] => 09/835578 [patent_app_country] => US [patent_app_date] => 2001-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5277 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016888.pdf [firstpage_image] =>[orig_patent_app_number] => 09835578 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/835578
Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgment Apr 16, 2001 Abandoned
Array ( [id] => 6901883 [patent_doc_number] => 20010023466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-20 [patent_title] => 'Memory device having a programmable register' [patent_app_type] => new [patent_app_number] => 09/835263 [patent_app_country] => US [patent_app_date] => 2001-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 15152 [patent_no_of_claims] => 150 [patent_no_of_ind_claims] => 21 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20010023466.pdf [firstpage_image] =>[orig_patent_app_number] => 09835263 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/835263
Memory device having a programmable register Apr 12, 2001 Issued
Array ( [id] => 6892561 [patent_doc_number] => 20010018723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-30 [patent_title] => 'Storage medium having electronic circuit and computer system having the storage medium' [patent_app_type] => new [patent_app_number] => 09/814289 [patent_app_country] => US [patent_app_date] => 2001-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4816 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20010018723.pdf [firstpage_image] =>[orig_patent_app_number] => 09814289 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/814289
Storage medium having electronic circuit and computer system having the storage medium Mar 20, 2001 Issued
Array ( [id] => 7321093 [patent_doc_number] => 20040225777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Memory repeater' [patent_app_type] => new [patent_app_number] => 09/804224 [patent_app_country] => US [patent_app_date] => 2001-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5383 [patent_no_of_claims] => 77 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20040225777.pdf [firstpage_image] =>[orig_patent_app_number] => 09804224 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/804224
Memory repeater Mar 12, 2001 Issued
Array ( [id] => 6450858 [patent_doc_number] => 20020129184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Effective bus utilization using bus arbiter' [patent_app_type] => new [patent_app_number] => 09/802417 [patent_app_country] => US [patent_app_date] => 2001-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3168 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20020129184.pdf [firstpage_image] =>[orig_patent_app_number] => 09802417 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/802417
Effective bus utilization using multiple bus interface circuits and arbitration logic circuit Mar 7, 2001 Issued
90/005932 COMMUNICATION INTERFACE CIRCUIT HAVING NETWORK CONNECTION DETECTION CAPABILITY Feb 19, 2001 Issued
Array ( [id] => 6565266 [patent_doc_number] => 20020112107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Scaleable arbitration and prioritization of multiple interrupts' [patent_app_type] => new [patent_app_number] => 09/780720 [patent_app_country] => US [patent_app_date] => 2001-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5222 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20020112107.pdf [firstpage_image] =>[orig_patent_app_number] => 09780720 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/780720
Scaleable arbitration and prioritization of multiple interrupts Feb 11, 2001 Issued
Array ( [id] => 7384531 [patent_doc_number] => 20040221082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'REDUCED COMPLEXITY COMPUTER SYSTEM ARCHITECTURE' [patent_app_type] => new [patent_app_number] => 09/781803 [patent_app_country] => US [patent_app_date] => 2001-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8967 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20040221082.pdf [firstpage_image] =>[orig_patent_app_number] => 09781803 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/781803
Reduced complexity computer system architecture Feb 11, 2001 Issued
Array ( [id] => 5791443 [patent_doc_number] => 20020161957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Methods and systems for handling interrupts' [patent_app_type] => new [patent_app_number] => 09/780039 [patent_app_country] => US [patent_app_date] => 2001-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6824 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20020161957.pdf [firstpage_image] =>[orig_patent_app_number] => 09780039 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/780039
Methods and systems for handling interrupts Feb 8, 2001 Abandoned
Array ( [id] => 5910501 [patent_doc_number] => 20020144038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Data communication prioritization method and bus controller' [patent_app_type] => new [patent_app_number] => 09/780985 [patent_app_country] => US [patent_app_date] => 2001-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7102 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20020144038.pdf [firstpage_image] =>[orig_patent_app_number] => 09780985 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/780985
Data communication prioritization method and bus controller Feb 8, 2001 Abandoned
Array ( [id] => 1250228 [patent_doc_number] => 06675252 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Accelerated graphics port (AGP) controller supporting fast write transactions' [patent_app_type] => B1 [patent_app_number] => 09/778653 [patent_app_country] => US [patent_app_date] => 2001-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5386 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/675/06675252.pdf [firstpage_image] =>[orig_patent_app_number] => 09778653 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/778653
Accelerated graphics port (AGP) controller supporting fast write transactions Feb 6, 2001 Issued
Array ( [id] => 6894523 [patent_doc_number] => 20010016889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Integrated network switching hub and bus structure' [patent_app_type] => new [patent_app_number] => 09/778173 [patent_app_country] => US [patent_app_date] => 2001-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4353 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016889.pdf [firstpage_image] =>[orig_patent_app_number] => 09778173 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/778173
Integrated network switching hub and bus structure Feb 5, 2001 Issued
Array ( [id] => 1165540 [patent_doc_number] => 06772262 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Memory module with improved data bus performance' [patent_app_type] => B1 [patent_app_number] => 09/777446 [patent_app_country] => US [patent_app_date] => 2001-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6416 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772262.pdf [firstpage_image] =>[orig_patent_app_number] => 09777446 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/777446
Memory module with improved data bus performance Feb 5, 2001 Issued
Menu