Search

Glenn Allen Auve

Examiner (ID: 3740, Phone: (571)272-3623 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2181, 2186, 2308, 2111, 2185, 2175, 2781, 2305
Total Applications
2279
Issued Applications
2041
Pending Applications
51
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3898287 [patent_doc_number] => 05805909 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Microprocessors or microcontroller utilizing FLL clock having a reduced power state' [patent_app_type] => 1 [patent_app_number] => 8/510808 [patent_app_country] => US [patent_app_date] => 1995-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 86 [patent_no_of_words] => 20328 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805909.pdf [firstpage_image] =>[orig_patent_app_number] => 510808 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/510808
Microprocessors or microcontroller utilizing FLL clock having a reduced power state Aug 2, 1995 Issued
Array ( [id] => 3736845 [patent_doc_number] => 05701493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Exception handling method and apparatus in data processing systems' [patent_app_type] => 1 [patent_app_number] => 8/510705 [patent_app_country] => US [patent_app_date] => 1995-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6578 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/701/05701493.pdf [firstpage_image] =>[orig_patent_app_number] => 510705 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/510705
Exception handling method and apparatus in data processing systems Aug 2, 1995 Issued
Array ( [id] => 3761619 [patent_doc_number] => 05802318 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Universal serial bus keyboard system' [patent_app_type] => 1 [patent_app_number] => 8/506884 [patent_app_country] => US [patent_app_date] => 1995-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7220 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802318.pdf [firstpage_image] =>[orig_patent_app_number] => 506884 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/506884
Universal serial bus keyboard system Jul 24, 1995 Issued
08/436209 MONITORING MODULE Jul 17, 1995 Abandoned
Array ( [id] => 4290148 [patent_doc_number] => 06308236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Local bus with dynamic decoding capability' [patent_app_type] => 1 [patent_app_number] => 8/498183 [patent_app_country] => US [patent_app_date] => 1995-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2100 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/308/06308236.pdf [firstpage_image] =>[orig_patent_app_number] => 498183 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/498183
Local bus with dynamic decoding capability Jul 4, 1995 Issued
08/482957 POWER UP/POWER DOWN FOR ELECTRONIC HARDWARE WHICH CONSERVES ELECTRIC POWER Jun 14, 1995 Abandoned
Array ( [id] => 3741510 [patent_doc_number] => 05671373 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Data bus protocol for computer graphics system' [patent_app_type] => 1 [patent_app_number] => 8/480607 [patent_app_country] => US [patent_app_date] => 1995-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4896 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/671/05671373.pdf [firstpage_image] =>[orig_patent_app_number] => 480607 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/480607
Data bus protocol for computer graphics system Jun 7, 1995 Issued
Array ( [id] => 3887611 [patent_doc_number] => 05838934 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Host port interface' [patent_app_type] => 1 [patent_app_number] => 8/471900 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 29280 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838934.pdf [firstpage_image] =>[orig_patent_app_number] => 471900 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/471900
Host port interface Jun 6, 1995 Issued
Array ( [id] => 3745012 [patent_doc_number] => 05694556 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'Data processing system including buffering mechanism for inbound and outbound reads and posted writes' [patent_app_type] => 1 [patent_app_number] => 8/472603 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3001 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/694/05694556.pdf [firstpage_image] =>[orig_patent_app_number] => 472603 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/472603
Data processing system including buffering mechanism for inbound and outbound reads and posted writes Jun 6, 1995 Issued
Array ( [id] => 3694955 [patent_doc_number] => 05634065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Three input arithmetic logic unit with controllable shifter and mask generator' [patent_app_type] => 1 [patent_app_number] => 8/475134 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 70 [patent_no_of_words] => 99263 [patent_no_of_claims] => 106 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/634/05634065.pdf [firstpage_image] =>[orig_patent_app_number] => 475134 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/475134
Three input arithmetic logic unit with controllable shifter and mask generator Jun 6, 1995 Issued
08/481706 COMPUTER SYSTEM HAVING AN IMPROVED BUS ARBITER ADAPTED FOR REAL TIME APPLICATIONS Jun 6, 1995 Abandoned
08/482097 BUS QUIETING CIRCIUTS, SYSTEMS AND METHOD Jun 6, 1995 Abandoned
Array ( [id] => 3568892 [patent_doc_number] => 05544289 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'Method and apparatus for controlling and communicating with business office devices' [patent_app_type] => 1 [patent_app_number] => 8/473780 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2488 [patent_no_of_claims] => 106 [patent_no_of_ind_claims] => 69 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/544/05544289.pdf [firstpage_image] =>[orig_patent_app_number] => 473780 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473780
Method and apparatus for controlling and communicating with business office devices Jun 5, 1995 Issued
Array ( [id] => 3857847 [patent_doc_number] => 05848280 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Apparatus for providing continuity of operation in a computer' [patent_app_type] => 1 [patent_app_number] => 8/470147 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 8530 [patent_no_of_claims] => 260 [patent_no_of_ind_claims] => 60 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/848/05848280.pdf [firstpage_image] =>[orig_patent_app_number] => 470147 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/470147
Apparatus for providing continuity of operation in a computer Jun 5, 1995 Issued
Array ( [id] => 3785352 [patent_doc_number] => 05734913 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-31 [patent_title] => 'Low power consumption semiconductor integrated circuit device and microprocessor' [patent_app_type] => 1 [patent_app_number] => 8/462662 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 30 [patent_no_of_words] => 11230 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/734/05734913.pdf [firstpage_image] =>[orig_patent_app_number] => 462662 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/462662
Low power consumption semiconductor integrated circuit device and microprocessor Jun 4, 1995 Issued
Array ( [id] => 3708394 [patent_doc_number] => 05619661 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Dynamic arbitration system and method' [patent_app_type] => 1 [patent_app_number] => 8/486401 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3829 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619661.pdf [firstpage_image] =>[orig_patent_app_number] => 486401 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/486401
Dynamic arbitration system and method Jun 4, 1995 Issued
Array ( [id] => 3897617 [patent_doc_number] => 05748874 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Reserved cylinder for SCSI device write back cache' [patent_app_type] => 1 [patent_app_number] => 8/464101 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2801 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/748/05748874.pdf [firstpage_image] =>[orig_patent_app_number] => 464101 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/464101
Reserved cylinder for SCSI device write back cache Jun 4, 1995 Issued
Array ( [id] => 3636108 [patent_doc_number] => 05613127 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-18 [patent_title] => 'Separately clocked processor synchronization improvement' [patent_app_type] => 1 [patent_app_number] => 8/457787 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1565 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/613/05613127.pdf [firstpage_image] =>[orig_patent_app_number] => 457787 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/457787
Separately clocked processor synchronization improvement Jun 1, 1995 Issued
Array ( [id] => 3716279 [patent_doc_number] => 05675749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Method and apparatus for controlling show cycles in a data processing system' [patent_app_type] => 1 [patent_app_number] => 8/460484 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 8141 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675749.pdf [firstpage_image] =>[orig_patent_app_number] => 460484 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/460484
Method and apparatus for controlling show cycles in a data processing system Jun 1, 1995 Issued
Array ( [id] => 3677375 [patent_doc_number] => 05668956 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Bus system for use with information processing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/449088 [patent_app_country] => US [patent_app_date] => 1995-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 7042 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668956.pdf [firstpage_image] =>[orig_patent_app_number] => 449088 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/449088
Bus system for use with information processing apparatus May 23, 1995 Issued
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