| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_kind] => NA
[patent_issue_date] => 1998-09-08
[patent_title] => 'Microprocessors or microcontroller utilizing FLL clock having a reduced power state'
[patent_app_type] => 1
[patent_app_number] => 8/510808
[patent_app_country] => US
[patent_app_date] => 1995-08-03
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[firstpage_image] =>[orig_patent_app_number] => 510808
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Array
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[patent_doc_number] => 05701493
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-23
[patent_title] => 'Exception handling method and apparatus in data processing systems'
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[patent_app_number] => 8/510705
[patent_app_country] => US
[patent_app_date] => 1995-08-03
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[firstpage_image] =>[orig_patent_app_number] => 510705
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/510705 | Exception handling method and apparatus in data processing systems | Aug 2, 1995 | Issued |
Array
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[id] => 3761619
[patent_doc_number] => 05802318
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Universal serial bus keyboard system'
[patent_app_type] => 1
[patent_app_number] => 8/506884
[patent_app_country] => US
[patent_app_date] => 1995-07-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/802/05802318.pdf
[firstpage_image] =>[orig_patent_app_number] => 506884
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/506884 | Universal serial bus keyboard system | Jul 24, 1995 | Issued |
| 08/436209 | MONITORING MODULE | Jul 17, 1995 | Abandoned |
Array
(
[id] => 4290148
[patent_doc_number] => 06308236
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-23
[patent_title] => 'Local bus with dynamic decoding capability'
[patent_app_type] => 1
[patent_app_number] => 8/498183
[patent_app_country] => US
[patent_app_date] => 1995-07-05
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[pdf_file] => patents/06/308/06308236.pdf
[firstpage_image] =>[orig_patent_app_number] => 498183
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/498183 | Local bus with dynamic decoding capability | Jul 4, 1995 | Issued |
| 08/482957 | POWER UP/POWER DOWN FOR ELECTRONIC HARDWARE WHICH CONSERVES ELECTRIC POWER | Jun 14, 1995 | Abandoned |
Array
(
[id] => 3741510
[patent_doc_number] => 05671373
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Data bus protocol for computer graphics system'
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[patent_app_number] => 8/480607
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[firstpage_image] =>[orig_patent_app_number] => 480607
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/480607 | Data bus protocol for computer graphics system | Jun 7, 1995 | Issued |
Array
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[id] => 3887611
[patent_doc_number] => 05838934
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-17
[patent_title] => 'Host port interface'
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[firstpage_image] =>[orig_patent_app_number] => 471900
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Array
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[id] => 3745012
[patent_doc_number] => 05694556
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[patent_kind] => NA
[patent_issue_date] => 1997-12-02
[patent_title] => 'Data processing system including buffering mechanism for inbound and outbound reads and posted writes'
[patent_app_type] => 1
[patent_app_number] => 8/472603
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[pdf_file] => patents/05/694/05694556.pdf
[firstpage_image] =>[orig_patent_app_number] => 472603
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/472603 | Data processing system including buffering mechanism for inbound and outbound reads and posted writes | Jun 6, 1995 | Issued |
Array
(
[id] => 3694955
[patent_doc_number] => 05634065
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-27
[patent_title] => 'Three input arithmetic logic unit with controllable shifter and mask generator'
[patent_app_type] => 1
[patent_app_number] => 8/475134
[patent_app_country] => US
[patent_app_date] => 1995-06-07
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[pdf_file] => patents/05/634/05634065.pdf
[firstpage_image] =>[orig_patent_app_number] => 475134
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/475134 | Three input arithmetic logic unit with controllable shifter and mask generator | Jun 6, 1995 | Issued |
| 08/481706 | COMPUTER SYSTEM HAVING AN IMPROVED BUS ARBITER ADAPTED FOR REAL TIME APPLICATIONS | Jun 6, 1995 | Abandoned |
| 08/482097 | BUS QUIETING CIRCIUTS, SYSTEMS AND METHOD | Jun 6, 1995 | Abandoned |
Array
(
[id] => 3568892
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[patent_issue_date] => 1996-08-06
[patent_title] => 'Method and apparatus for controlling and communicating with business office devices'
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[firstpage_image] =>[orig_patent_app_number] => 473780
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/473780 | Method and apparatus for controlling and communicating with business office devices | Jun 5, 1995 | Issued |
Array
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[id] => 3857847
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-08
[patent_title] => 'Apparatus for providing continuity of operation in a computer'
[patent_app_type] => 1
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Array
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Low power consumption semiconductor integrated circuit device and microprocessor'
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[firstpage_image] =>[orig_patent_app_number] => 462662
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/462662 | Low power consumption semiconductor integrated circuit device and microprocessor | Jun 4, 1995 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/464101 | Reserved cylinder for SCSI device write back cache | Jun 4, 1995 | Issued |
Array
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[firstpage_image] =>[orig_patent_app_number] => 457787
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/457787 | Separately clocked processor synchronization improvement | Jun 1, 1995 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/460484 | Method and apparatus for controlling show cycles in a data processing system | Jun 1, 1995 | Issued |
Array
(
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[patent_issue_date] => 1997-09-16
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/449088 | Bus system for use with information processing apparatus | May 23, 1995 | Issued |