Search

Glenn E. Richman

Examiner (ID: 16798, Phone: (571)272-4981 , Office: P/3764 )

Most Active Art Unit
3764
Art Unit(s)
3764, 3302, 3733, 2302
Total Applications
2360
Issued Applications
1852
Pending Applications
161
Abandoned Applications
355

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17583074 [patent_doc_number] => 20220139929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => MEMORY STRUCTURES AND METHODS OF FORMING MEMORY STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/087683 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6227 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087683 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/087683
Memory structures and methods of forming memory structures Nov 2, 2020 Issued
Array ( [id] => 17652756 [patent_doc_number] => 11355496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => High-density 3D-dram cell with scaled capacitors [patent_app_type] => utility [patent_app_number] => 17/086628 [patent_app_country] => US [patent_app_date] => 2020-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 6994 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086628 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/086628
High-density 3D-dram cell with scaled capacitors Nov 1, 2020 Issued
Array ( [id] => 17395923 [patent_doc_number] => 11244947 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-08 [patent_title] => Semiconductor device for a volatile memory and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/081004 [patent_app_country] => US [patent_app_date] => 2020-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 6236 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17081004 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/081004
Semiconductor device for a volatile memory and method of manufacturing semiconductor device Oct 26, 2020 Issued
Array ( [id] => 17745738 [patent_doc_number] => 11393820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Vertical digit line for semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/079745 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 52 [patent_no_of_words] => 24922 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17079745 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/079745
Vertical digit line for semiconductor devices Oct 25, 2020 Issued
Array ( [id] => 16617484 [patent_doc_number] => 20210036137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => NANOWIRE STRUCTURES HAVING WRAP-AROUND CONTACTS [patent_app_type] => utility [patent_app_number] => 17/072992 [patent_app_country] => US [patent_app_date] => 2020-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17072992 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/072992
Nanowire structures having wrap-around contacts Oct 15, 2020 Issued
Array ( [id] => 17700275 [patent_doc_number] => 11374009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Integrated circuit device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/070938 [patent_app_country] => US [patent_app_date] => 2020-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3237 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17070938 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/070938
Integrated circuit device and manufacturing method thereof Oct 14, 2020 Issued
Array ( [id] => 16601763 [patent_doc_number] => 20210028294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => METHOD FOR FORMING A LOW-K SPACER [patent_app_type] => utility [patent_app_number] => 17/068504 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8228 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068504 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/068504
Method for forming a low-k spacer Oct 11, 2020 Issued
Array ( [id] => 19416645 [patent_doc_number] => 12082509 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Dual magnetic tunnel junction (DMTJ) stack design [patent_app_type] => utility [patent_app_number] => 17/063392 [patent_app_country] => US [patent_app_date] => 2020-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 9180 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17063392 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/063392
Dual magnetic tunnel junction (DMTJ) stack design Oct 4, 2020 Issued
Array ( [id] => 19597062 [patent_doc_number] => 12154916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Apparatus for manufacturing display device and method of manufacturing the display device [patent_app_type] => utility [patent_app_number] => 17/039020 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 18092 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17039020 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/039020
Apparatus for manufacturing display device and method of manufacturing the display device Sep 29, 2020 Issued
Array ( [id] => 17509245 [patent_doc_number] => 20220102348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => Integrated Circuitry, Memory Circuitry, Method Used In Forming Integrated Circuitry, And Method Used In Forming Memory Circuitry [patent_app_type] => utility [patent_app_number] => 17/038799 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5329 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17038799 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/038799
Integrated circuitry, memory circuitry, method used in forming integrated circuitry, and method used in forming memory circuitry Sep 29, 2020 Issued
Array ( [id] => 18236208 [patent_doc_number] => 11600776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Apparatus for and method of fabricating semiconductor device [patent_app_type] => utility [patent_app_number] => 17/033460 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 5077 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17033460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/033460
Apparatus for and method of fabricating semiconductor device Sep 24, 2020 Issued
Array ( [id] => 17803346 [patent_doc_number] => 11417659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-16 [patent_title] => Semiconductor memory device and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/025272 [patent_app_country] => US [patent_app_date] => 2020-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 6576 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17025272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/025272
Semiconductor memory device and method of fabricating the same Sep 17, 2020 Issued
Array ( [id] => 17638297 [patent_doc_number] => 11349033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Semiconductor device and semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/022328 [patent_app_country] => US [patent_app_date] => 2020-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 68 [patent_figures_cnt] => 68 [patent_no_of_words] => 16831 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17022328 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/022328
Semiconductor device and semiconductor memory device Sep 15, 2020 Issued
Array ( [id] => 17448429 [patent_doc_number] => 20220068934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => Method Used In Forming An Array Of Vertical Transistors And Method Used In Forming An Array Of Memory Cells Individually Comprising A Vertical Transistor And A Storage Device Above The Vertical Transistor [patent_app_type] => utility [patent_app_number] => 17/016609 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016609 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/016609
Method used in forming an array of vertical transistors and method used in forming an array of memory cells individually comprising a vertical transistor and a storage device above the vertical transistor Sep 9, 2020 Issued
Array ( [id] => 17448422 [patent_doc_number] => 20220068927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => CHANNEL FORMATION FOR VERTICAL THREE DIMENSIONAL (3D) MEMORY [patent_app_type] => utility [patent_app_number] => 17/004917 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004917 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/004917
Channel formation for vertical three dimensional (3D) memory Aug 26, 2020 Issued
Array ( [id] => 19244625 [patent_doc_number] => 12015080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Integrated assemblies and methods of forming integrated assemblies [patent_app_type] => utility [patent_app_number] => 16/998877 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 6187 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998877 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998877
Integrated assemblies and methods of forming integrated assemblies Aug 19, 2020 Issued
Array ( [id] => 17941700 [patent_doc_number] => 11476159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Shared contact structure and methods for forming the same [patent_app_type] => utility [patent_app_number] => 16/995299 [patent_app_country] => US [patent_app_date] => 2020-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10768 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16995299 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/995299
Shared contact structure and methods for forming the same Aug 16, 2020 Issued
Array ( [id] => 16471842 [patent_doc_number] => 20200373380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH CAPACITORS [patent_app_type] => utility [patent_app_number] => 16/991385 [patent_app_country] => US [patent_app_date] => 2020-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/991385
Structure and formation method of semiconductor device with capacitors Aug 11, 2020 Issued
Array ( [id] => 17787871 [patent_doc_number] => 11411007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Semiconductor memory device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/991661 [patent_app_country] => US [patent_app_date] => 2020-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 66 [patent_figures_cnt] => 66 [patent_no_of_words] => 13566 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991661 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/991661
Semiconductor memory device and method of manufacturing the same Aug 11, 2020 Issued
Array ( [id] => 20319171 [patent_doc_number] => 12457732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Memory cell and memory device [patent_app_type] => utility [patent_app_number] => 17/635740 [patent_app_country] => US [patent_app_date] => 2020-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 34 [patent_no_of_words] => 20980 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17635740 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/635740
Memory cell and memory device Aug 10, 2020 Issued
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