Search

Glenn E. Richman

Examiner (ID: 3601, Phone: (571)272-4981 , Office: P/3764 )

Most Active Art Unit
3764
Art Unit(s)
3764, 3733, 2302, 3302
Total Applications
2360
Issued Applications
1852
Pending Applications
161
Abandoned Applications
355

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1549830 [patent_doc_number] => 06346475 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Method of manufacturing semiconductor integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/689838 [patent_app_country] => US [patent_app_date] => 2000-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6245 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346475.pdf [firstpage_image] =>[orig_patent_app_number] => 09689838 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/689838
Method of manufacturing semiconductor integrated circuit Oct 12, 2000 Issued
Array ( [id] => 1507460 [patent_doc_number] => 06440845 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Method of fabricating interconnect of capacitor' [patent_app_type] => B1 [patent_app_number] => 09/684591 [patent_app_country] => US [patent_app_date] => 2000-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1452 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/440/06440845.pdf [firstpage_image] =>[orig_patent_app_number] => 09684591 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/684591
Method of fabricating interconnect of capacitor Oct 4, 2000 Issued
Array ( [id] => 1545468 [patent_doc_number] => 06444591 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Method for reducing contamination prior to epitaxial growth and related structure' [patent_app_type] => B1 [patent_app_number] => 09/677708 [patent_app_country] => US [patent_app_date] => 2000-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4864 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/444/06444591.pdf [firstpage_image] =>[orig_patent_app_number] => 09677708 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/677708
Method for reducing contamination prior to epitaxial growth and related structure Sep 29, 2000 Issued
Array ( [id] => 4303606 [patent_doc_number] => 06326255 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/675053 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4417 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326255.pdf [firstpage_image] =>[orig_patent_app_number] => 675053 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/675053
Semiconductor device Sep 28, 2000 Issued
Array ( [id] => 1559944 [patent_doc_number] => 06436847 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Methods to form electronic devices' [patent_app_type] => B1 [patent_app_number] => 09/676429 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4378 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/436/06436847.pdf [firstpage_image] =>[orig_patent_app_number] => 09676429 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/676429
Methods to form electronic devices Sep 28, 2000 Issued
Array ( [id] => 1446570 [patent_doc_number] => 06368921 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Manufacture of trench-gate semiconductor devices' [patent_app_type] => B1 [patent_app_number] => 09/671888 [patent_app_country] => US [patent_app_date] => 2000-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4572 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/368/06368921.pdf [firstpage_image] =>[orig_patent_app_number] => 09671888 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/671888
Manufacture of trench-gate semiconductor devices Sep 27, 2000 Issued
Array ( [id] => 1440155 [patent_doc_number] => 06495474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Method of fabricating a dielectric layer' [patent_app_type] => B1 [patent_app_number] => 09/659668 [patent_app_country] => US [patent_app_date] => 2000-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3431 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/495/06495474.pdf [firstpage_image] =>[orig_patent_app_number] => 09659668 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/659668
Method of fabricating a dielectric layer Sep 10, 2000 Issued
Array ( [id] => 1585443 [patent_doc_number] => 06358798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Method for forming gate electrode by damascene process' [patent_app_type] => B1 [patent_app_number] => 09/655678 [patent_app_country] => US [patent_app_date] => 2000-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2031 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/358/06358798.pdf [firstpage_image] =>[orig_patent_app_number] => 09655678 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/655678
Method for forming gate electrode by damascene process Sep 5, 2000 Issued
Array ( [id] => 4310668 [patent_doc_number] => 06316346 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Antifuse development using .alpha.-C:H,N,F thin films' [patent_app_type] => 1 [patent_app_number] => 9/654868 [patent_app_country] => US [patent_app_date] => 2000-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1916 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316346.pdf [firstpage_image] =>[orig_patent_app_number] => 654868 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/654868
Antifuse development using .alpha.-C:H,N,F thin films Sep 4, 2000 Issued
Array ( [id] => 1494963 [patent_doc_number] => 06403455 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Methods of fabricating a memory device' [patent_app_type] => B1 [patent_app_number] => 09/653228 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2517 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403455.pdf [firstpage_image] =>[orig_patent_app_number] => 09653228 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/653228
Methods of fabricating a memory device Aug 30, 2000 Issued
Array ( [id] => 1446693 [patent_doc_number] => 06368986 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Use of selective ozone TEOS oxide to create variable thickness layers and spacers' [patent_app_type] => B1 [patent_app_number] => 09/652188 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2828 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/368/06368986.pdf [firstpage_image] =>[orig_patent_app_number] => 09652188 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652188
Use of selective ozone TEOS oxide to create variable thickness layers and spacers Aug 30, 2000 Issued
Array ( [id] => 1520777 [patent_doc_number] => 06413887 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Method for producing silicon nitride series film' [patent_app_type] => B1 [patent_app_number] => 09/650168 [patent_app_country] => US [patent_app_date] => 2000-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4060 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/413/06413887.pdf [firstpage_image] =>[orig_patent_app_number] => 09650168 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/650168
Method for producing silicon nitride series film Aug 28, 2000 Issued
Array ( [id] => 1435904 [patent_doc_number] => 06355547 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Method of forming a self-aligned contact pad for a semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/645968 [patent_app_country] => US [patent_app_date] => 2000-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 3643 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/355/06355547.pdf [firstpage_image] =>[orig_patent_app_number] => 09645968 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/645968
Method of forming a self-aligned contact pad for a semiconductor device Aug 23, 2000 Issued
Array ( [id] => 1446513 [patent_doc_number] => 06368885 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Method for manufacturing a micromechanical component' [patent_app_type] => B1 [patent_app_number] => 09/641438 [patent_app_country] => US [patent_app_date] => 2000-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1696 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/368/06368885.pdf [firstpage_image] =>[orig_patent_app_number] => 09641438 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/641438
Method for manufacturing a micromechanical component Aug 16, 2000 Issued
Array ( [id] => 4310599 [patent_doc_number] => 06316342 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Low turn-on voltage indium phosphide Schottky device and method' [patent_app_type] => 1 [patent_app_number] => 9/640458 [patent_app_country] => US [patent_app_date] => 2000-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2628 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/316/06316342.pdf [firstpage_image] =>[orig_patent_app_number] => 640458 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/640458
Low turn-on voltage indium phosphide Schottky device and method Aug 14, 2000 Issued
Array ( [id] => 1602578 [patent_doc_number] => 06432757 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Method of manufacturing liquid crystal display panel by poly-crystallizing amorphous silicon film using both a laser and lamp lights' [patent_app_type] => B1 [patent_app_number] => 09/639418 [patent_app_country] => US [patent_app_date] => 2000-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3196 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/432/06432757.pdf [firstpage_image] =>[orig_patent_app_number] => 09639418 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/639418
Method of manufacturing liquid crystal display panel by poly-crystallizing amorphous silicon film using both a laser and lamp lights Aug 13, 2000 Issued
Array ( [id] => 1450078 [patent_doc_number] => 06455421 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Plasma treatment of tantalum nitride compound films formed by chemical vapor deposition' [patent_app_type] => B1 [patent_app_number] => 09/629778 [patent_app_country] => US [patent_app_date] => 2000-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2926 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/455/06455421.pdf [firstpage_image] =>[orig_patent_app_number] => 09629778 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/629778
Plasma treatment of tantalum nitride compound films formed by chemical vapor deposition Jul 30, 2000 Issued
Array ( [id] => 7643945 [patent_doc_number] => 06429093 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Sidewall process for forming a low resistance source line' [patent_app_type] => B1 [patent_app_number] => 09/627258 [patent_app_country] => US [patent_app_date] => 2000-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4852 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429093.pdf [firstpage_image] =>[orig_patent_app_number] => 09627258 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/627258
Sidewall process for forming a low resistance source line Jul 27, 2000 Issued
Array ( [id] => 1507385 [patent_doc_number] => 06440824 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Method of crystallizing a semiconductor thin film, and method of manufacturing a thin-film semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/626888 [patent_app_country] => US [patent_app_date] => 2000-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 7640 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/440/06440824.pdf [firstpage_image] =>[orig_patent_app_number] => 09626888 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/626888
Method of crystallizing a semiconductor thin film, and method of manufacturing a thin-film semiconductor device Jul 26, 2000 Issued
Array ( [id] => 1332570 [patent_doc_number] => 06596631 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Method of forming copper interconnect capping layers with improved interface and adhesion' [patent_app_type] => B1 [patent_app_number] => 09/626455 [patent_app_country] => US [patent_app_date] => 2000-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4767 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/596/06596631.pdf [firstpage_image] =>[orig_patent_app_number] => 09626455 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/626455
Method of forming copper interconnect capping layers with improved interface and adhesion Jul 25, 2000 Issued
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