Search

Glenn Gossage

Examiner (ID: 13715, Phone: (571)270-7569 , Office: P/2135 )

Most Active Art Unit
2303
Art Unit(s)
2303, 2187, 2759, 2135, 2312, 2751, 2185
Total Applications
1465
Issued Applications
1132
Pending Applications
36
Abandoned Applications
297

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2896355 [patent_doc_number] => 05214601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-25 [patent_title] => 'Bit line structure for semiconductor memory device including cross-points and multiple interconnect layers' [patent_app_type] => 1 [patent_app_number] => 7/876690 [patent_app_country] => US [patent_app_date] => 1992-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8623 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/214/05214601.pdf [firstpage_image] =>[orig_patent_app_number] => 876690 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/876690
Bit line structure for semiconductor memory device including cross-points and multiple interconnect layers Apr 27, 1992 Issued
Array ( [id] => 3032197 [patent_doc_number] => 05289408 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-22 [patent_title] => 'Memory apparatus using tunnel current techniques' [patent_app_type] => 1 [patent_app_number] => 7/873635 [patent_app_country] => US [patent_app_date] => 1992-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4264 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/289/05289408.pdf [firstpage_image] =>[orig_patent_app_number] => 873635 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/873635
Memory apparatus using tunnel current techniques Apr 22, 1992 Issued
Array ( [id] => 3454633 [patent_doc_number] => 05467457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-14 [patent_title] => 'Read only type semiconductor memory device including address coincidence detecting circuits assigned to specific address regions and method of operating the same' [patent_app_type] => 1 [patent_app_number] => 7/867541 [patent_app_country] => US [patent_app_date] => 1992-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 10185 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/467/05467457.pdf [firstpage_image] =>[orig_patent_app_number] => 867541 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/867541
Read only type semiconductor memory device including address coincidence detecting circuits assigned to specific address regions and method of operating the same Apr 12, 1992 Issued
07/864184 DYNAMIC SEMICONDUCTOR MEMORY DEVICE HAVING AN IMPROVED SENSE AMPLIFIER LAYOUT ARRANGEMENT Apr 2, 1992 Abandoned
07/861473 APPARATUS AND METHOD FOR FAST PROGRAM, ERASE, AND REPAIR SEQUENCES FOR A NONVOLATILE SEMICONDUCTOR MEMORY Mar 31, 1992 Abandoned
Array ( [id] => 3505647 [patent_doc_number] => 05537572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Cache controller and method for dumping contents of a cache directory and cache data random access memory (RAM)' [patent_app_type] => 1 [patent_app_number] => 7/860812 [patent_app_country] => US [patent_app_date] => 1992-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2998 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/537/05537572.pdf [firstpage_image] =>[orig_patent_app_number] => 860812 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/860812
Cache controller and method for dumping contents of a cache directory and cache data random access memory (RAM) Mar 30, 1992 Issued
Array ( [id] => 3016599 [patent_doc_number] => 05375222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-20 [patent_title] => 'Flash memory card with a ready/busy mask register' [patent_app_type] => 1 [patent_app_number] => 7/861013 [patent_app_country] => US [patent_app_date] => 1992-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 41 [patent_no_of_words] => 20212 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/375/05375222.pdf [firstpage_image] =>[orig_patent_app_number] => 861013 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/861013
Flash memory card with a ready/busy mask register Mar 30, 1992 Issued
Array ( [id] => 3090436 [patent_doc_number] => 05321652 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-14 [patent_title] => 'Microcomputer having a dual port memory of supplying write data directly to an output' [patent_app_type] => 1 [patent_app_number] => 7/859865 [patent_app_country] => US [patent_app_date] => 1992-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7940 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/321/05321652.pdf [firstpage_image] =>[orig_patent_app_number] => 859865 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/859865
Microcomputer having a dual port memory of supplying write data directly to an output Mar 29, 1992 Issued
Array ( [id] => 3505677 [patent_doc_number] => 05537574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Sysplex shared data coherency method' [patent_app_type] => 1 [patent_app_number] => 7/860805 [patent_app_country] => US [patent_app_date] => 1992-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 36 [patent_no_of_words] => 30582 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/537/05537574.pdf [firstpage_image] =>[orig_patent_app_number] => 860805 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/860805
Sysplex shared data coherency method Mar 29, 1992 Issued
Array ( [id] => 2955870 [patent_doc_number] => 05255235 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-19 [patent_title] => 'Dynamic random access memory with dummy word lines connected to bit line potential adjusting capacitors' [patent_app_type] => 1 [patent_app_number] => 7/859269 [patent_app_country] => US [patent_app_date] => 1992-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6530 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/255/05255235.pdf [firstpage_image] =>[orig_patent_app_number] => 859269 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/859269
Dynamic random access memory with dummy word lines connected to bit line potential adjusting capacitors Mar 24, 1992 Issued
Array ( [id] => 2925369 [patent_doc_number] => 05237675 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-17 [patent_title] => 'Apparatus and method for efficient organization of compressed data on a hard disk utilizing an estimated compression factor' [patent_app_type] => 1 [patent_app_number] => 7/857082 [patent_app_country] => US [patent_app_date] => 1992-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5208 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/237/05237675.pdf [firstpage_image] =>[orig_patent_app_number] => 857082 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/857082
Apparatus and method for efficient organization of compressed data on a hard disk utilizing an estimated compression factor Mar 18, 1992 Issued
Array ( [id] => 3021208 [patent_doc_number] => 05355466 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-11 [patent_title] => 'Single chip microcomputer having an address discrimination circuit and an operation mode terminal for protecting the content of internal ROM' [patent_app_type] => 1 [patent_app_number] => 7/847332 [patent_app_country] => US [patent_app_date] => 1992-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3224 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 607 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/355/05355466.pdf [firstpage_image] =>[orig_patent_app_number] => 847332 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/847332
Single chip microcomputer having an address discrimination circuit and an operation mode terminal for protecting the content of internal ROM Mar 5, 1992 Issued
07/844812 TWO-LEVEL VIRTUAL/REAL SET-ASSOCIATE CACHE AND METHOD WITH IMPROVED SYNONYM DETECTION Mar 1, 1992 Abandoned
07/860731 CACHE MEMORY Feb 20, 1992 Abandoned
07/835119 SEMICONDUCTOR MEMORY DEVICE Feb 13, 1992 Abandoned
Array ( [id] => 3602753 [patent_doc_number] => 05488710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-30 [patent_title] => 'Cache memory and data processor including instruction length decoding circuitry for simultaneously decoding a plurality of variable length instructions' [patent_app_type] => 1 [patent_app_number] => 7/833412 [patent_app_country] => US [patent_app_date] => 1992-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 6325 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/488/05488710.pdf [firstpage_image] =>[orig_patent_app_number] => 833412 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/833412
Cache memory and data processor including instruction length decoding circuitry for simultaneously decoding a plurality of variable length instructions Feb 9, 1992 Issued
07/831020 DUAL-PORT MEMORY WITH SELECTIVE READ DATA OUTPUT PROHIBITION Feb 3, 1992 Abandoned
Array ( [id] => 3437778 [patent_doc_number] => 05404475 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-04 [patent_title] => 'Memory apparatus comprising memory cards with a side detecting signal pin and address assignment circuitry' [patent_app_type] => 1 [patent_app_number] => 7/830523 [patent_app_country] => US [patent_app_date] => 1992-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 5430 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/404/05404475.pdf [firstpage_image] =>[orig_patent_app_number] => 830523 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/830523
Memory apparatus comprising memory cards with a side detecting signal pin and address assignment circuitry Feb 2, 1992 Issued
07/830214 MEMORY DEVICE WITH END-OF-CYCLE PRECHARGE Jan 29, 1992 Abandoned
Array ( [id] => 3107336 [patent_doc_number] => 05299153 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-29 [patent_title] => 'System and medium for recording/reproducing charge latent image' [patent_app_type] => 1 [patent_app_number] => 7/826665 [patent_app_country] => US [patent_app_date] => 1992-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 6752 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/299/05299153.pdf [firstpage_image] =>[orig_patent_app_number] => 826665 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/826665
System and medium for recording/reproducing charge latent image Jan 28, 1992 Issued
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