Search

Glenn Gossage

Examiner (ID: 13715, Phone: (571)270-7569 , Office: P/2135 )

Most Active Art Unit
2303
Art Unit(s)
2303, 2187, 2759, 2135, 2312, 2751, 2185
Total Applications
1465
Issued Applications
1132
Pending Applications
36
Abandoned Applications
297

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3094936 [patent_doc_number] => 05280596 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-18 [patent_title] => 'Write-acknowledge circuit including a write detector and a bistable element for four-phase handshake signalling' [patent_app_type] => 1 [patent_app_number] => 7/659805 [patent_app_country] => US [patent_app_date] => 1991-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2867 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/280/05280596.pdf [firstpage_image] =>[orig_patent_app_number] => 659805 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/659805
Write-acknowledge circuit including a write detector and a bistable element for four-phase handshake signalling Feb 20, 1991 Issued
Array ( [id] => 2840537 [patent_doc_number] => 05128895 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Method for programming a virtual ground EPROM cell including slow ramping of the column line voltage' [patent_app_type] => 1 [patent_app_number] => 7/658184 [patent_app_country] => US [patent_app_date] => 1991-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4408 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/128/05128895.pdf [firstpage_image] =>[orig_patent_app_number] => 658184 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/658184
Method for programming a virtual ground EPROM cell including slow ramping of the column line voltage Feb 19, 1991 Issued
Array ( [id] => 2853953 [patent_doc_number] => 05138572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-11 [patent_title] => 'Optical information memory medium including indium (In) and bismuth (Bi)' [patent_app_type] => 1 [patent_app_number] => 7/657966 [patent_app_country] => US [patent_app_date] => 1991-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 36 [patent_no_of_words] => 11770 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/138/05138572.pdf [firstpage_image] =>[orig_patent_app_number] => 657966 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/657966
Optical information memory medium including indium (In) and bismuth (Bi) Feb 19, 1991 Issued
07/658421 DECODING GLOBAL DRIVE/BOOT SIGNALS USING LOCAL PREDECODERS Feb 19, 1991 Abandoned
07/654662 MEMORY PAGE PROPERTY TAGGING SYSTEM AND METHOD Feb 12, 1991 Abandoned
Array ( [id] => 3021172 [patent_doc_number] => 05355464 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-11 [patent_title] => 'Circuitry and method for suspending the automated erasure of a non-volatile semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/655650 [patent_app_country] => US [patent_app_date] => 1991-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5862 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/355/05355464.pdf [firstpage_image] =>[orig_patent_app_number] => 655650 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/655650
Circuitry and method for suspending the automated erasure of a non-volatile semiconductor memory Feb 10, 1991 Issued
Array ( [id] => 2858778 [patent_doc_number] => 05111435 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'Bipolar-CMOS semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/652491 [patent_app_country] => US [patent_app_date] => 1991-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3230 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111435.pdf [firstpage_image] =>[orig_patent_app_number] => 652491 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/652491
Bipolar-CMOS semiconductor memory device Feb 7, 1991 Issued
Array ( [id] => 2836447 [patent_doc_number] => 05117393 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-26 [patent_title] => 'Method of testing memory cells in an address multiplexed dynamic RAM including test mode selection' [patent_app_type] => 1 [patent_app_number] => 7/648885 [patent_app_country] => US [patent_app_date] => 1991-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5549 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/117/05117393.pdf [firstpage_image] =>[orig_patent_app_number] => 648885 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/648885
Method of testing memory cells in an address multiplexed dynamic RAM including test mode selection Jan 30, 1991 Issued
07/647564 SINGLE CHIP MICROCOMPUTER AND METHOD FOR WRITING PROGRAM DATA THEREIN AFTER MOUNTING ON A CIRCUIT BOARD Jan 28, 1991 Abandoned
Array ( [id] => 2992671 [patent_doc_number] => 05253356 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-12 [patent_title] => 'Direct memory access (DMA) request controlling arrangement including sample and hold circuits and capable of handling immediately successive DMA requests' [patent_app_type] => 1 [patent_app_number] => 7/647100 [patent_app_country] => US [patent_app_date] => 1991-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3065 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 392 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/253/05253356.pdf [firstpage_image] =>[orig_patent_app_number] => 647100 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/647100
Direct memory access (DMA) request controlling arrangement including sample and hold circuits and capable of handling immediately successive DMA requests Jan 28, 1991 Issued
07/647623 METHOD OF RESTORING WRITE DATA IN DISK CACHE SYSTEM Jan 28, 1991 Abandoned
Array ( [id] => 2924859 [patent_doc_number] => 05228135 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-13 [patent_title] => 'Multiport cache memory control unit including a tag memory having plural address ports and a snoop address part' [patent_app_type] => 1 [patent_app_number] => 7/645642 [patent_app_country] => US [patent_app_date] => 1991-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6404 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 410 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/228/05228135.pdf [firstpage_image] =>[orig_patent_app_number] => 645642 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/645642
Multiport cache memory control unit including a tag memory having plural address ports and a snoop address part Jan 24, 1991 Issued
Array ( [id] => 3009702 [patent_doc_number] => 05363500 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-08 [patent_title] => 'System for improving access time to video display data using shadow memory sized differently from a display memory' [patent_app_type] => 1 [patent_app_number] => 7/645902 [patent_app_country] => US [patent_app_date] => 1991-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 4382 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/363/05363500.pdf [firstpage_image] =>[orig_patent_app_number] => 645902 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/645902
System for improving access time to video display data using shadow memory sized differently from a display memory Jan 23, 1991 Issued
07/643689 FIELD MEMORY SELF-REFRESHING DEVICE Jan 17, 1991 Abandoned
Array ( [id] => 2861789 [patent_doc_number] => 05134582 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-28 [patent_title] => 'Memory system for ANDing data bits along columns of an inverted memory array' [patent_app_type] => 1 [patent_app_number] => 7/638156 [patent_app_country] => US [patent_app_date] => 1991-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 30 [patent_no_of_words] => 9080 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/134/05134582.pdf [firstpage_image] =>[orig_patent_app_number] => 638156 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/638156
Memory system for ANDing data bits along columns of an inverted memory array Jan 9, 1991 Issued
Array ( [id] => 2859458 [patent_doc_number] => 05105388 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-14 [patent_title] => 'Programmable logic device including verify circuit for macro-cell' [patent_app_type] => 1 [patent_app_number] => 7/632652 [patent_app_country] => US [patent_app_date] => 1990-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 5417 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/105/05105388.pdf [firstpage_image] =>[orig_patent_app_number] => 632652 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/632652
Programmable logic device including verify circuit for macro-cell Dec 25, 1990 Issued
07/623645 MEMORY CARTRIDGE Dec 17, 1990 Abandoned
07/629029 NON-VOLATILE SEMICONDUCTOR MEMORY WITH NAND CELL STRUCTURE Dec 17, 1990 Abandoned
Array ( [id] => 3024073 [patent_doc_number] => 05276835 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Non-blocking serialization for caching data in a shared cache' [patent_app_type] => 1 [patent_app_number] => 7/628211 [patent_app_country] => US [patent_app_date] => 1990-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7354 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276835.pdf [firstpage_image] =>[orig_patent_app_number] => 628211 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/628211
Non-blocking serialization for caching data in a shared cache Dec 13, 1990 Issued
Array ( [id] => 2814278 [patent_doc_number] => 05146430 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Self-refresh system for use in a field memory device' [patent_app_type] => 1 [patent_app_number] => 7/615876 [patent_app_country] => US [patent_app_date] => 1990-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3316 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146430.pdf [firstpage_image] =>[orig_patent_app_number] => 615876 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/615876
Self-refresh system for use in a field memory device Nov 19, 1990 Issued
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