Search

Gopal C. Ray

Examiner (ID: 14134)

Most Active Art Unit
2781
Art Unit(s)
2307, 2787, 2111, 2305, 2781, 2181, 2308
Total Applications
1625
Issued Applications
1400
Pending Applications
56
Abandoned Applications
169

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 908312 [patent_doc_number] => 07337249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures' [patent_app_type] => utility [patent_app_number] => 11/820943 [patent_app_country] => US [patent_app_date] => 2007-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 8674 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/337/07337249.pdf [firstpage_image] =>[orig_patent_app_number] => 11820943 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/820943
I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures Jun 19, 2007 Issued
Array ( [id] => 5195210 [patent_doc_number] => 20070083695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'WIRELESS USB HARDWARE SCHEDULING' [patent_app_type] => utility [patent_app_number] => 11/608560 [patent_app_country] => US [patent_app_date] => 2006-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20070083695.pdf [firstpage_image] =>[orig_patent_app_number] => 11608560 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/608560
Wireless USB hardware scheduling Dec 7, 2006 Issued
Array ( [id] => 863950 [patent_doc_number] => 07373442 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Method for using an expander to connect to different storage interconnect architectures' [patent_app_type] => utility [patent_app_number] => 11/551215 [patent_app_country] => US [patent_app_date] => 2006-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8442 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/373/07373442.pdf [firstpage_image] =>[orig_patent_app_number] => 11551215 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/551215
Method for using an expander to connect to different storage interconnect architectures Oct 18, 2006 Issued
Array ( [id] => 863952 [patent_doc_number] => 07373443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Multiple interfaces in a storage enclosure' [patent_app_type] => utility [patent_app_number] => 11/551218 [patent_app_country] => US [patent_app_date] => 2006-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8376 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/373/07373443.pdf [firstpage_image] =>[orig_patent_app_number] => 11551218 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/551218
Multiple interfaces in a storage enclosure Oct 18, 2006 Issued
Array ( [id] => 384613 [patent_doc_number] => 07308521 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-12-11 [patent_title] => 'Multi-port communications integrated circuit and method for facilitating communication between a central processing chipset and multiple communication ports' [patent_app_type] => utility [patent_app_number] => 11/506555 [patent_app_country] => US [patent_app_date] => 2006-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1588 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/308/07308521.pdf [firstpage_image] =>[orig_patent_app_number] => 11506555 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/506555
Multi-port communications integrated circuit and method for facilitating communication between a central processing chipset and multiple communication ports Aug 17, 2006 Issued
Array ( [id] => 5627026 [patent_doc_number] => 20060265531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Combined host interface controller for conducting communication between a host system and multiple devices in multiple protocols' [patent_app_type] => utility [patent_app_number] => 11/495346 [patent_app_country] => US [patent_app_date] => 2006-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4080 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20060265531.pdf [firstpage_image] =>[orig_patent_app_number] => 11495346 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/495346
Combined host interface controller for conducting communication between a host system and multiple devices in multiple protocols Jul 27, 2006 Issued
Array ( [id] => 5788803 [patent_doc_number] => 20060206645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Performing arbitration in a data processing apparatus' [patent_app_type] => utility [patent_app_number] => 11/431650 [patent_app_country] => US [patent_app_date] => 2006-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7860 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20060206645.pdf [firstpage_image] =>[orig_patent_app_number] => 11431650 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/431650
Performing arbitration in a data processing apparatus May 10, 2006 Issued
Array ( [id] => 925004 [patent_doc_number] => 07320046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-15 [patent_title] => 'Optical disc drive having a control board and driving unit in separate locations' [patent_app_type] => utility [patent_app_number] => 11/418265 [patent_app_country] => US [patent_app_date] => 2006-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2221 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/320/07320046.pdf [firstpage_image] =>[orig_patent_app_number] => 11418265 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/418265
Optical disc drive having a control board and driving unit in separate locations May 4, 2006 Issued
Array ( [id] => 503542 [patent_doc_number] => 07213091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-01 [patent_title] => 'SRAM bus architecture and interconnect to an FPGA' [patent_app_type] => utility [patent_app_number] => 11/410415 [patent_app_country] => US [patent_app_date] => 2006-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5596 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/213/07213091.pdf [firstpage_image] =>[orig_patent_app_number] => 11410415 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/410415
SRAM bus architecture and interconnect to an FPGA Apr 23, 2006 Issued
Array ( [id] => 5927831 [patent_doc_number] => 20060242343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Core logic device of computer system' [patent_app_type] => utility [patent_app_number] => 11/408149 [patent_app_country] => US [patent_app_date] => 2006-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3137 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20060242343.pdf [firstpage_image] =>[orig_patent_app_number] => 11408149 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/408149
Core logic device of computer system Apr 19, 2006 Issued
Array ( [id] => 894402 [patent_doc_number] => 07350013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => 'Bus communication apparatus for programmable logic devices and associated methods' [patent_app_type] => utility [patent_app_number] => 11/404563 [patent_app_country] => US [patent_app_date] => 2006-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6006 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/350/07350013.pdf [firstpage_image] =>[orig_patent_app_number] => 11404563 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/404563
Bus communication apparatus for programmable logic devices and associated methods Apr 13, 2006 Issued
Array ( [id] => 908341 [patent_doc_number] => 07337261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Memory apparatus connectable to a host system having a USB connector' [patent_app_type] => utility [patent_app_number] => 11/402908 [patent_app_country] => US [patent_app_date] => 2006-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 5271 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/337/07337261.pdf [firstpage_image] =>[orig_patent_app_number] => 11402908 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/402908
Memory apparatus connectable to a host system having a USB connector Apr 12, 2006 Issued
Array ( [id] => 856146 [patent_doc_number] => 07380037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Data transmitter between external device and working memory' [patent_app_type] => utility [patent_app_number] => 11/400531 [patent_app_country] => US [patent_app_date] => 2006-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2518 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/380/07380037.pdf [firstpage_image] =>[orig_patent_app_number] => 11400531 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/400531
Data transmitter between external device and working memory Apr 9, 2006 Issued
Array ( [id] => 5673853 [patent_doc_number] => 20060179208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'System and method for memory hub-based expansion bus' [patent_app_type] => utility [patent_app_number] => 11/399873 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5379 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20060179208.pdf [firstpage_image] =>[orig_patent_app_number] => 11399873 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/399873
System and method for memory hub-based expansion bus Apr 6, 2006 Issued
Array ( [id] => 553310 [patent_doc_number] => 07174409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-06 [patent_title] => 'System and method for memory hub-based expansion bus' [patent_app_type] => utility [patent_app_number] => 11/399905 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5404 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/174/07174409.pdf [firstpage_image] =>[orig_patent_app_number] => 11399905 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/399905
System and method for memory hub-based expansion bus Apr 6, 2006 Issued
Array ( [id] => 490190 [patent_doc_number] => 07222210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-22 [patent_title] => 'System and method for memory hub-based expansion bus' [patent_app_type] => utility [patent_app_number] => 11/399986 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5403 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/222/07222210.pdf [firstpage_image] =>[orig_patent_app_number] => 11399986 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/399986
System and method for memory hub-based expansion bus Apr 6, 2006 Issued
Array ( [id] => 553390 [patent_doc_number] => 07174413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-06 [patent_title] => 'Switching apparatus and method for providing shared I/O within a load-store fabric' [patent_app_type] => utility [patent_app_number] => 11/278417 [patent_app_country] => US [patent_app_date] => 2006-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 20094 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/174/07174413.pdf [firstpage_image] =>[orig_patent_app_number] => 11278417 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/278417
Switching apparatus and method for providing shared I/O within a load-store fabric Mar 31, 2006 Issued
Array ( [id] => 890321 [patent_doc_number] => 07353316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-01 [patent_title] => 'System and method for re-routing signals between memory system components' [patent_app_type] => utility [patent_app_number] => 11/388296 [patent_app_country] => US [patent_app_date] => 2006-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5456 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/353/07353316.pdf [firstpage_image] =>[orig_patent_app_number] => 11388296 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/388296
System and method for re-routing signals between memory system components Mar 23, 2006 Issued
Array ( [id] => 5621083 [patent_doc_number] => 20060190618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Information processing system, reproducing terminal device and reproducing method, information processing device and method, and program' [patent_app_type] => utility [patent_app_number] => 11/349265 [patent_app_country] => US [patent_app_date] => 2006-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9177 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20060190618.pdf [firstpage_image] =>[orig_patent_app_number] => 11349265 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/349265
Information processing system, reproducing terminal device and reproducing method, information processing device and method, and program for synchronous display of content Feb 7, 2006 Issued
Array ( [id] => 5650913 [patent_doc_number] => 20060136648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Bus station with integrated bus monitor function' [patent_app_type] => utility [patent_app_number] => 11/349313 [patent_app_country] => US [patent_app_date] => 2006-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6820 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20060136648.pdf [firstpage_image] =>[orig_patent_app_number] => 11349313 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/349313
Bus station with integrated bus monitor function Feb 5, 2006 Issued
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