Search

Gopal C. Ray

Examiner (ID: 2012)

Most Active Art Unit
2781
Art Unit(s)
2305, 2308, 2307, 2781, 2111, 2787, 2181
Total Applications
1625
Issued Applications
1400
Pending Applications
56
Abandoned Applications
169

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20056071 [patent_doc_number] => 20250194293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => MICROSTRUCTURE ENHANCED ABSORPTION PHOTOSENSITIVE DEVICES [patent_app_type] => utility [patent_app_number] => 19/036506 [patent_app_country] => US [patent_app_date] => 2025-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27238 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19036506 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/036506
MICROSTRUCTURE ENHANCED ABSORPTION PHOTOSENSITIVE DEVICES Jan 23, 2025 Pending
Array ( [id] => 19812535 [patent_doc_number] => 12243948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Microstructure enhanced absorption photosensitive devices [patent_app_type] => utility [patent_app_number] => 18/822880 [patent_app_country] => US [patent_app_date] => 2024-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 93 [patent_no_of_words] => 32563 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18822880 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/822880
Microstructure enhanced absorption photosensitive devices Sep 2, 2024 Issued
Array ( [id] => 19500315 [patent_doc_number] => 20240339333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/731181 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18731181 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/731181
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE May 30, 2024 Pending
Array ( [id] => 19436228 [patent_doc_number] => 20240304726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/665023 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18665023 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/665023
Display device and method of fabricating the same May 14, 2024 Issued
Array ( [id] => 19438015 [patent_doc_number] => 20240306513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => METHODS FOR MANUFACTURING MAGNETORESISTIVE STACK DEVICES [patent_app_type] => utility [patent_app_number] => 18/664928 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11308 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664928 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/664928
METHODS FOR MANUFACTURING MAGNETORESISTIVE STACK DEVICES May 14, 2024 Pending
Array ( [id] => 19422315 [patent_doc_number] => 20240298439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => PLANAR COMPLEMENTARY MOSFET STRUCTURE TO REDUCE LEAKAGES AND PLANAR AREAS [patent_app_type] => utility [patent_app_number] => 18/662717 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662717 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662717
PLANAR COMPLEMENTARY MOSFET STRUCTURE TO REDUCE LEAKAGES AND PLANAR AREAS May 12, 2024 Pending
Array ( [id] => 19591740 [patent_doc_number] => 20240389297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT [patent_app_type] => utility [patent_app_number] => 18/660471 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8360 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660471 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660471
SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT May 9, 2024 Pending
Array ( [id] => 20339005 [patent_doc_number] => 20250343125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 18/652772 [patent_app_country] => US [patent_app_date] => 2024-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652772 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652772
SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHOD OF THE SAME Apr 30, 2024 Pending
Array ( [id] => 19386927 [patent_doc_number] => 20240276797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/645392 [patent_app_country] => US [patent_app_date] => 2024-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9978 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645392 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/645392
Organic light emitting display device and method of manufacturing the same Apr 24, 2024 Issued
Array ( [id] => 19893359 [patent_doc_number] => 20250118671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/643761 [patent_app_country] => US [patent_app_date] => 2024-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18643761 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/643761
SEMICONDUCTOR DEVICE Apr 22, 2024 Pending
Array ( [id] => 20299340 [patent_doc_number] => 20250324583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => INTEGRATED CIRCUIT READ ONLY MEMORY (ROM) STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/636945 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18636945 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/636945
INTEGRATED CIRCUIT READ ONLY MEMORY (ROM) STRUCTURE Apr 15, 2024 Pending
Array ( [id] => 19486644 [patent_doc_number] => 20240334686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/621622 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621622 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/621622
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME Mar 28, 2024 Pending
Array ( [id] => 20283760 [patent_doc_number] => 20250309002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => METHOD FOR INSPECTING SEMICONDUCTOR BONDED STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/620991 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18620991 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/620991
METHOD FOR INSPECTING SEMICONDUCTOR BONDED STRUCTURE Mar 27, 2024 Pending
Array ( [id] => 19712758 [patent_doc_number] => 20250022900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => IMAGE SENSOR AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/618477 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618477 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618477
IMAGE SENSOR AND MANUFACTURING METHOD THEREOF Mar 26, 2024 Pending
Array ( [id] => 19305767 [patent_doc_number] => 20240234347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => METHOD OF MAKING ELECTROSTATIC DISCHARGE PROTECTION CELL AND ANTENNA INTEGRATED WITH THROUGH SILICON VIA [patent_app_type] => utility [patent_app_number] => 18/615303 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615303 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615303
Method of making electrostatic discharge protection cell and antenna integrated with through silicon via Mar 24, 2024 Issued
Array ( [id] => 20251235 [patent_doc_number] => 20250300104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => INTEGRATED DEVICE COMPRISING METALLIZATION PORTION WITH STEP PAD INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 18/611385 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10955 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18611385 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/611385
INTEGRATED DEVICE COMPRISING METALLIZATION PORTION WITH STEP PAD INTERCONNECTS Mar 19, 2024 Pending
Array ( [id] => 20251211 [patent_doc_number] => 20250300080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => INTEGRATED CIRCUITS (ICs) HAVING SEPARATE SIGNAL AND POWER DISTRIBUTION NETWORK (PDN) INTERCONNECT STRUCTURES FOR REDUCED POWER SIGNAL ROUTING CONGESTION AND PATH LENGTHS, AND RELATED THREE-DIMENSIONAL (3D) ICs (3DICs) AND FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 18/609314 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609314 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/609314
INTEGRATED CIRCUITS (ICs) HAVING SEPARATE SIGNAL AND POWER DISTRIBUTION NETWORK (PDN) INTERCONNECT STRUCTURES FOR REDUCED POWER SIGNAL ROUTING CONGESTION AND PATH LENGTHS, AND RELATED THREE-DIMENSIONAL (3D) ICs (3DICs) AND FABRICATION METHODS Mar 18, 2024 Pending
Array ( [id] => 20457447 [patent_doc_number] => 12520519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width [patent_app_type] => utility [patent_app_number] => 18/608294 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 2367 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608294 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608294
Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width Mar 17, 2024 Issued
Array ( [id] => 20237619 [patent_doc_number] => 20250294938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => METHOD AND APPARATUS FOR ELECTRICAL BOND PROTECTION [patent_app_type] => utility [patent_app_number] => 18/605344 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18605344 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/605344
METHOD AND APPARATUS FOR ELECTRICAL BOND PROTECTION Mar 13, 2024 Pending
Array ( [id] => 20235785 [patent_doc_number] => 20250293104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => PACKAGE ASSEMBLY AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/605724 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18605724 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/605724
PACKAGE ASSEMBLY AND MANUFACTURING METHOD THEREOF Mar 13, 2024 Pending
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