
Gopal C. Ray
Examiner (ID: 16225)
| Most Active Art Unit | 2781 |
| Art Unit(s) | 2307, 2781, 2305, 2111, 2181, 2787, 2308 |
| Total Applications | 1625 |
| Issued Applications | 1400 |
| Pending Applications | 56 |
| Abandoned Applications | 169 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6388766
[patent_doc_number] => 20020120802
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-29
[patent_title] => 'Digital signal processor interrupt accelerator'
[patent_app_type] => new
[patent_app_number] => 09/796271
[patent_app_country] => US
[patent_app_date] => 2001-02-28
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4500
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0120/20020120802.pdf
[firstpage_image] =>[orig_patent_app_number] => 09796271
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/796271 | Method and system for an interrupt accelerator that reduces the number of interrupts for a digital signal processor | Feb 27, 2001 | Issued |
Array
(
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[patent_doc_number] => 20020019900
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[patent_kind] => A1
[patent_issue_date] => 2002-02-14
[patent_title] => 'Bus system and data transfer method therefor'
[patent_app_type] => new
[patent_app_number] => 09/794160
[patent_app_country] => US
[patent_app_date] => 2001-02-28
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[pdf_file] => publications/A1/0019/20020019900.pdf
[firstpage_image] =>[orig_patent_app_number] => 09794160
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/794160 | Bus system having an address/control bus and a data bus, and a data transfer method thereof | Feb 27, 2001 | Issued |
Array
(
[id] => 5791600
[patent_doc_number] => 20020162032
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-31
[patent_title] => 'Method, system and computer program for load management'
[patent_app_type] => new
[patent_app_number] => 09/793589
[patent_app_country] => US
[patent_app_date] => 2001-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => publications/A1/0162/20020162032.pdf
[firstpage_image] =>[orig_patent_app_number] => 09793589
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/793589 | Method, system and computer program for load management | Feb 26, 2001 | Abandoned |
Array
(
[id] => 1109701
[patent_doc_number] => 06813672
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[patent_kind] => B1
[patent_issue_date] => 2004-11-02
[patent_title] => 'EMC enhancement for differential devices'
[patent_app_type] => B1
[patent_app_number] => 09/791355
[patent_app_country] => US
[patent_app_date] => 2001-02-23
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 09791355
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/791355 | EMC enhancement for differential devices | Feb 22, 2001 | Issued |
Array
(
[id] => 1116531
[patent_doc_number] => 06804727
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[patent_kind] => B1
[patent_issue_date] => 2004-10-12
[patent_title] => 'Method for communication from a host computer to a peripheral device'
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[patent_app_number] => 09/792632
[patent_app_country] => US
[patent_app_date] => 2001-02-23
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[firstpage_image] =>[orig_patent_app_number] => 09792632
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/792632 | Method for communication from a host computer to a peripheral device | Feb 22, 2001 | Issued |
Array
(
[id] => 6484582
[patent_doc_number] => 20020152341
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-17
[patent_title] => 'Method and system for generating multiple self-ID packets on the 1394 bus using a standard PHY chip'
[patent_app_type] => new
[patent_app_number] => 09/790427
[patent_app_country] => US
[patent_app_date] => 2001-02-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0152/20020152341.pdf
[firstpage_image] =>[orig_patent_app_number] => 09790427
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/790427 | Method and system for generating multiple self-ID packets on the 1394 bus using a standard PHY chip | Feb 21, 2001 | Issued |
| 09/763376 | Method and device for computer-assisted hybrid system model determination and device for regulating a hybrid system | Feb 20, 2001 | Abandoned |
Array
(
[id] => 1161321
[patent_doc_number] => 06775731
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-10
[patent_title] => 'Computer system with extension unit connected to peripheral equipment'
[patent_app_type] => B2
[patent_app_number] => 09/788401
[patent_app_country] => US
[patent_app_date] => 2001-02-21
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/775/06775731.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788401 | Computer system with extension unit connected to peripheral equipment | Feb 20, 2001 | Issued |
Array
(
[id] => 1184616
[patent_doc_number] => 06748476
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-06-08
[patent_title] => 'Control system including controller and field devices'
[patent_app_type] => B2
[patent_app_number] => 09/789646
[patent_app_country] => US
[patent_app_date] => 2001-02-21
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[patent_drawing_sheets_cnt] => 9
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/789646 | Control system including controller and field devices | Feb 20, 2001 | Issued |
Array
(
[id] => 5926370
[patent_doc_number] => 20020116560
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[patent_issue_date] => 2002-08-22
[patent_title] => 'Method and apparatus for distributing multi-source/multi-sink control signals among nodes on a chip'
[patent_app_type] => new
[patent_app_number] => 09/785602
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/785602 | Method and apparatus for distributing multi-source/multi-sink control signals among nodes on a chip | Feb 15, 2001 | Issued |
Array
(
[id] => 1165589
[patent_doc_number] => 06772267
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[patent_issue_date] => 2004-08-03
[patent_title] => 'Multi-portal bridge for providing network connectivity'
[patent_app_type] => B2
[patent_app_number] => 09/784831
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/784831 | Multi-portal bridge for providing network connectivity | Feb 15, 2001 | Issued |
Array
(
[id] => 1250226
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[patent_title] => 'Fault tolerant communications using a universal serial bus'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/782918 | Fault tolerant communications using a universal serial bus | Feb 12, 2001 | Issued |
Array
(
[id] => 1200906
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[patent_title] => 'Simple mechanism for guaranteeing in order read data return on a split transaction bus'
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Array
(
[id] => 7623857
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[patent_title] => 'I2C bus switching devices interspersed between I2C devices'
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Array
(
[id] => 1183491
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[patent_issue_date] => 2004-06-15
[patent_title] => 'Fibre channel mini-hub powered by and supported within a host computer and directly controlled over a bus of the host computer'
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Array
(
[id] => 1196911
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Array
(
[id] => 1206830
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[patent_title] => 'Data processing system and bus control method for stream data transfer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/772869 | Data processing system and bus control method for stream data transfer | Jan 30, 2001 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/775147 | PC card having casing part edges joined by fingers in recesses and tabs in slots | Jan 30, 2001 | Issued |
Array
(
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Array
(
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