Search

Gopal C. Ray

Examiner (ID: 16225)

Most Active Art Unit
2781
Art Unit(s)
2307, 2781, 2305, 2111, 2181, 2787, 2308
Total Applications
1625
Issued Applications
1400
Pending Applications
56
Abandoned Applications
169

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6388766 [patent_doc_number] => 20020120802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-29 [patent_title] => 'Digital signal processor interrupt accelerator' [patent_app_type] => new [patent_app_number] => 09/796271 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4500 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20020120802.pdf [firstpage_image] =>[orig_patent_app_number] => 09796271 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796271
Method and system for an interrupt accelerator that reduces the number of interrupts for a digital signal processor Feb 27, 2001 Issued
Array ( [id] => 6035502 [patent_doc_number] => 20020019900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-14 [patent_title] => 'Bus system and data transfer method therefor' [patent_app_type] => new [patent_app_number] => 09/794160 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3460 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20020019900.pdf [firstpage_image] =>[orig_patent_app_number] => 09794160 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/794160
Bus system having an address/control bus and a data bus, and a data transfer method thereof Feb 27, 2001 Issued
Array ( [id] => 5791600 [patent_doc_number] => 20020162032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Method, system and computer program for load management' [patent_app_type] => new [patent_app_number] => 09/793589 [patent_app_country] => US [patent_app_date] => 2001-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5677 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20020162032.pdf [firstpage_image] =>[orig_patent_app_number] => 09793589 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/793589
Method, system and computer program for load management Feb 26, 2001 Abandoned
Array ( [id] => 1109701 [patent_doc_number] => 06813672 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-02 [patent_title] => 'EMC enhancement for differential devices' [patent_app_type] => B1 [patent_app_number] => 09/791355 [patent_app_country] => US [patent_app_date] => 2001-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/813/06813672.pdf [firstpage_image] =>[orig_patent_app_number] => 09791355 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/791355
EMC enhancement for differential devices Feb 22, 2001 Issued
Array ( [id] => 1116531 [patent_doc_number] => 06804727 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-12 [patent_title] => 'Method for communication from a host computer to a peripheral device' [patent_app_type] => B1 [patent_app_number] => 09/792632 [patent_app_country] => US [patent_app_date] => 2001-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6746 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/804/06804727.pdf [firstpage_image] =>[orig_patent_app_number] => 09792632 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/792632
Method for communication from a host computer to a peripheral device Feb 22, 2001 Issued
Array ( [id] => 6484582 [patent_doc_number] => 20020152341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Method and system for generating multiple self-ID packets on the 1394 bus using a standard PHY chip' [patent_app_type] => new [patent_app_number] => 09/790427 [patent_app_country] => US [patent_app_date] => 2001-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3008 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20020152341.pdf [firstpage_image] =>[orig_patent_app_number] => 09790427 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/790427
Method and system for generating multiple self-ID packets on the 1394 bus using a standard PHY chip Feb 21, 2001 Issued
09/763376 Method and device for computer-assisted hybrid system model determination and device for regulating a hybrid system Feb 20, 2001 Abandoned
Array ( [id] => 1161321 [patent_doc_number] => 06775731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Computer system with extension unit connected to peripheral equipment' [patent_app_type] => B2 [patent_app_number] => 09/788401 [patent_app_country] => US [patent_app_date] => 2001-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4148 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/775/06775731.pdf [firstpage_image] =>[orig_patent_app_number] => 09788401 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788401
Computer system with extension unit connected to peripheral equipment Feb 20, 2001 Issued
Array ( [id] => 1184616 [patent_doc_number] => 06748476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-08 [patent_title] => 'Control system including controller and field devices' [patent_app_type] => B2 [patent_app_number] => 09/789646 [patent_app_country] => US [patent_app_date] => 2001-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6940 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/748/06748476.pdf [firstpage_image] =>[orig_patent_app_number] => 09789646 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/789646
Control system including controller and field devices Feb 20, 2001 Issued
Array ( [id] => 5926370 [patent_doc_number] => 20020116560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Method and apparatus for distributing multi-source/multi-sink control signals among nodes on a chip' [patent_app_type] => new [patent_app_number] => 09/785602 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3421 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20020116560.pdf [firstpage_image] =>[orig_patent_app_number] => 09785602 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/785602
Method and apparatus for distributing multi-source/multi-sink control signals among nodes on a chip Feb 15, 2001 Issued
Array ( [id] => 1165589 [patent_doc_number] => 06772267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-03 [patent_title] => 'Multi-portal bridge for providing network connectivity' [patent_app_type] => B2 [patent_app_number] => 09/784831 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2981 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772267.pdf [firstpage_image] =>[orig_patent_app_number] => 09784831 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/784831
Multi-portal bridge for providing network connectivity Feb 15, 2001 Issued
Array ( [id] => 1250226 [patent_doc_number] => 06675250 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Fault tolerant communications using a universal serial bus' [patent_app_type] => B1 [patent_app_number] => 09/782918 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4175 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/675/06675250.pdf [firstpage_image] =>[orig_patent_app_number] => 09782918 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782918
Fault tolerant communications using a universal serial bus Feb 12, 2001 Issued
Array ( [id] => 1200906 [patent_doc_number] => 06728816 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'Simple mechanism for guaranteeing in order read data return on a split transaction bus' [patent_app_type] => B1 [patent_app_number] => 09/780061 [patent_app_country] => US [patent_app_date] => 2001-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4175 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/728/06728816.pdf [firstpage_image] =>[orig_patent_app_number] => 09780061 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/780061
Simple mechanism for guaranteeing in order read data return on a split transaction bus Feb 8, 2001 Issued
Array ( [id] => 7623857 [patent_doc_number] => 06725320 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'I2C bus switching devices interspersed between I2C devices' [patent_app_type] => B1 [patent_app_number] => 09/779364 [patent_app_country] => US [patent_app_date] => 2001-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3112 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/725/06725320.pdf [firstpage_image] =>[orig_patent_app_number] => 09779364 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/779364
I2C bus switching devices interspersed between I2C devices Feb 7, 2001 Issued
Array ( [id] => 1183491 [patent_doc_number] => 06751699 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-15 [patent_title] => 'Fibre channel mini-hub powered by and supported within a host computer and directly controlled over a bus of the host computer' [patent_app_type] => B1 [patent_app_number] => 09/776802 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3620 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751699.pdf [firstpage_image] =>[orig_patent_app_number] => 09776802 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/776802
Fibre channel mini-hub powered by and supported within a host computer and directly controlled over a bus of the host computer Feb 4, 2001 Issued
Array ( [id] => 1196911 [patent_doc_number] => 06732215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'Super scalable multiprocessor computer system' [patent_app_type] => B2 [patent_app_number] => 09/727250 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2072 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732215.pdf [firstpage_image] =>[orig_patent_app_number] => 09727250 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/727250
Super scalable multiprocessor computer system Feb 4, 2001 Issued
Array ( [id] => 1206830 [patent_doc_number] => 06721832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-13 [patent_title] => 'Data processing system and bus control method for stream data transfer' [patent_app_type] => B2 [patent_app_number] => 09/772869 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3839 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/721/06721832.pdf [firstpage_image] =>[orig_patent_app_number] => 09772869 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772869
Data processing system and bus control method for stream data transfer Jan 30, 2001 Issued
Array ( [id] => 7029702 [patent_doc_number] => 20010014926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'PC card casing' [patent_app_type] => new [patent_app_number] => 09/775147 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2464 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20010014926.pdf [firstpage_image] =>[orig_patent_app_number] => 09775147 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/775147
PC card having casing part edges joined by fingers in recesses and tabs in slots Jan 30, 2001 Issued
Array ( [id] => 1225522 [patent_doc_number] => 06704832 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Peripheral bus jumper block for a configurable peripheral bus interconnect system' [patent_app_type] => B1 [patent_app_number] => 09/774233 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3422 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/704/06704832.pdf [firstpage_image] =>[orig_patent_app_number] => 09774233 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/774233
Peripheral bus jumper block for a configurable peripheral bus interconnect system Jan 30, 2001 Issued
Array ( [id] => 5876832 [patent_doc_number] => 20020049875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'Data communications interfaces' [patent_app_type] => new [patent_app_number] => 09/773227 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7477 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20020049875.pdf [firstpage_image] =>[orig_patent_app_number] => 09773227 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/773227
Data communications interfaces Jan 30, 2001 Abandoned
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