
Gopal C. Ray
Examiner (ID: 16225)
| Most Active Art Unit | 2781 |
| Art Unit(s) | 2307, 2781, 2305, 2111, 2181, 2787, 2308 |
| Total Applications | 1625 |
| Issued Applications | 1400 |
| Pending Applications | 56 |
| Abandoned Applications | 169 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1557394
[patent_doc_number] => 06349393
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-02-19
[patent_title] => 'Method and apparatus for training an automated software test'
[patent_app_type] => B1
[patent_app_number] => 09/240923
[patent_app_country] => US
[patent_app_date] => 1999-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 21
[patent_no_of_words] => 11279
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/349/06349393.pdf
[firstpage_image] =>[orig_patent_app_number] => 09240923
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/240923 | Method and apparatus for training an automated software test | Jan 28, 1999 | Issued |
Array
(
[id] => 4377137
[patent_doc_number] => 06219795
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-17
[patent_title] => 'Thermal management apparatus based on a power supply output'
[patent_app_type] => 1
[patent_app_number] => 9/240548
[patent_app_country] => US
[patent_app_date] => 1999-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2755
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/219/06219795.pdf
[firstpage_image] =>[orig_patent_app_number] => 240548
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/240548 | Thermal management apparatus based on a power supply output | Jan 28, 1999 | Issued |
Array
(
[id] => 1592508
[patent_doc_number] => 06360337
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-19
[patent_title] => 'System and method to perform histogrammic counting for performance evaluation'
[patent_app_type] => B1
[patent_app_number] => 09/238246
[patent_app_country] => US
[patent_app_date] => 1999-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4000
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/360/06360337.pdf
[firstpage_image] =>[orig_patent_app_number] => 09238246
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/238246 | System and method to perform histogrammic counting for performance evaluation | Jan 26, 1999 | Issued |
Array
(
[id] => 4424334
[patent_doc_number] => 06301676
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-09
[patent_title] => 'Robust and recoverable interprocess locks'
[patent_app_type] => 1
[patent_app_number] => 9/235881
[patent_app_country] => US
[patent_app_date] => 1999-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3287
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/301/06301676.pdf
[firstpage_image] =>[orig_patent_app_number] => 235881
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/235881 | Robust and recoverable interprocess locks | Jan 21, 1999 | Issued |
Array
(
[id] => 6161613
[patent_doc_number] => 20020147939
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-10
[patent_title] => 'ON-CHIP DEBUG SYSTEM WITH A DATA BAND SELECTOR'
[patent_app_type] => new
[patent_app_number] => 09/235565
[patent_app_country] => US
[patent_app_date] => 1999-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5153
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0147/20020147939.pdf
[firstpage_image] =>[orig_patent_app_number] => 09235565
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/235565 | On-chip debug system | Jan 21, 1999 | Issued |
Array
(
[id] => 4324944
[patent_doc_number] => 06327670
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-04
[patent_title] => 'Duplex processor with an update bus and method for operating the update bus'
[patent_app_type] => 1
[patent_app_number] => 9/236060
[patent_app_country] => US
[patent_app_date] => 1999-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2424
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/327/06327670.pdf
[firstpage_image] =>[orig_patent_app_number] => 236060
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/236060 | Duplex processor with an update bus and method for operating the update bus | Jan 21, 1999 | Issued |
Array
(
[id] => 4347193
[patent_doc_number] => 06330694
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-11
[patent_title] => 'Fault tolerant system and method utilizing the peripheral components interconnection bus monitoring card'
[patent_app_type] => 1
[patent_app_number] => 9/234372
[patent_app_country] => US
[patent_app_date] => 1999-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2746
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/330/06330694.pdf
[firstpage_image] =>[orig_patent_app_number] => 234372
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/234372 | Fault tolerant system and method utilizing the peripheral components interconnection bus monitoring card | Jan 20, 1999 | Issued |
Array
(
[id] => 1481277
[patent_doc_number] => 06389556
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-14
[patent_title] => 'Mechanism to prevent data loss in case of a power failure while a PC is in suspend to RAM state'
[patent_app_type] => B1
[patent_app_number] => 09/234528
[patent_app_country] => US
[patent_app_date] => 1999-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2732
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/389/06389556.pdf
[firstpage_image] =>[orig_patent_app_number] => 09234528
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/234528 | Mechanism to prevent data loss in case of a power failure while a PC is in suspend to RAM state | Jan 20, 1999 | Issued |
Array
(
[id] => 4400856
[patent_doc_number] => 06304980
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-16
[patent_title] => 'Peer-to-peer backup system with failure-triggered device switching honoring reservation of primary device'
[patent_app_type] => 1
[patent_app_number] => 9/234806
[patent_app_country] => US
[patent_app_date] => 1999-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 12914
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 262
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/304/06304980.pdf
[firstpage_image] =>[orig_patent_app_number] => 234806
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/234806 | Peer-to-peer backup system with failure-triggered device switching honoring reservation of primary device | Jan 18, 1999 | Issued |
Array
(
[id] => 1549717
[patent_doc_number] => 06374364
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-16
[patent_title] => 'Fault tolerant computing system using instruction counting'
[patent_app_type] => B1
[patent_app_number] => 09/234797
[patent_app_country] => US
[patent_app_date] => 1999-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4134
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/374/06374364.pdf
[firstpage_image] =>[orig_patent_app_number] => 09234797
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/234797 | Fault tolerant computing system using instruction counting | Jan 18, 1999 | Issued |
Array
(
[id] => 4326052
[patent_doc_number] => 06253329
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-26
[patent_title] => 'Universal serial bus (USB) hub having a plurality of input power sources'
[patent_app_type] => 1
[patent_app_number] => 9/232809
[patent_app_country] => US
[patent_app_date] => 1999-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2747
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/253/06253329.pdf
[firstpage_image] =>[orig_patent_app_number] => 232809
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/232809 | Universal serial bus (USB) hub having a plurality of input power sources | Jan 18, 1999 | Issued |
Array
(
[id] => 7638562
[patent_doc_number] => 06397359
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-28
[patent_title] => 'Methods, systems and computer program products for scheduled network performance testing'
[patent_app_type] => B1
[patent_app_number] => 09/234276
[patent_app_country] => US
[patent_app_date] => 1999-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 14602
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 15
[patent_words_short_claim] => 12
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/397/06397359.pdf
[firstpage_image] =>[orig_patent_app_number] => 09234276
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/234276 | Methods, systems and computer program products for scheduled network performance testing | Jan 18, 1999 | Issued |
Array
(
[id] => 1567620
[patent_doc_number] => 06363495
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-26
[patent_title] => 'Method and apparatus for partition resolution in clustered computer systems'
[patent_app_type] => B1
[patent_app_number] => 09/232243
[patent_app_country] => US
[patent_app_date] => 1999-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 11132
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/363/06363495.pdf
[firstpage_image] =>[orig_patent_app_number] => 09232243
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/232243 | Method and apparatus for partition resolution in clustered computer systems | Jan 18, 1999 | Issued |
Array
(
[id] => 4325126
[patent_doc_number] => 06253268
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-26
[patent_title] => 'Method and system for multiplexing a second interface on an I2C interface'
[patent_app_type] => 1
[patent_app_number] => 9/232291
[patent_app_country] => US
[patent_app_date] => 1999-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3555
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/253/06253268.pdf
[firstpage_image] =>[orig_patent_app_number] => 232291
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/232291 | Method and system for multiplexing a second interface on an I2C interface | Jan 14, 1999 | Issued |
Array
(
[id] => 1602128
[patent_doc_number] => 06385743
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-07
[patent_title] => 'Method of synchronizing an electronic device for monitoring the operation of a microprocessor, and an electronic device for carrying out the method'
[patent_app_type] => B1
[patent_app_number] => 09/227673
[patent_app_country] => US
[patent_app_date] => 1999-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2686
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/385/06385743.pdf
[firstpage_image] =>[orig_patent_app_number] => 09227673
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/227673 | Method of synchronizing an electronic device for monitoring the operation of a microprocessor, and an electronic device for carrying out the method | Jan 7, 1999 | Issued |
Array
(
[id] => 7642335
[patent_doc_number] => 06430711
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-06
[patent_title] => 'System and method for monitoring the state of a plurality of machines connected via a computer network'
[patent_app_type] => B1
[patent_app_number] => 09/226332
[patent_app_country] => US
[patent_app_date] => 1999-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 44
[patent_no_of_words] => 29634
[patent_no_of_claims] => 69
[patent_no_of_ind_claims] => 18
[patent_words_short_claim] => 8
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/430/06430711.pdf
[firstpage_image] =>[orig_patent_app_number] => 09226332
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/226332 | System and method for monitoring the state of a plurality of machines connected via a computer network | Jan 5, 1999 | Issued |
Array
(
[id] => 1557381
[patent_doc_number] => 06349390
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-02-19
[patent_title] => 'On-board scrubbing of soft errors memory module'
[patent_app_type] => B1
[patent_app_number] => 09/224990
[patent_app_country] => US
[patent_app_date] => 1999-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 4011
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/349/06349390.pdf
[firstpage_image] =>[orig_patent_app_number] => 09224990
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/224990 | On-board scrubbing of soft errors memory module | Jan 3, 1999 | Issued |
Array
(
[id] => 4334995
[patent_doc_number] => 06243782
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-05
[patent_title] => 'Method and apparatus for disabling a graphics device when an upgrade device is installed'
[patent_app_type] => 1
[patent_app_number] => 9/224184
[patent_app_country] => US
[patent_app_date] => 1998-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1410
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/243/06243782.pdf
[firstpage_image] =>[orig_patent_app_number] => 224184
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/224184 | Method and apparatus for disabling a graphics device when an upgrade device is installed | Dec 30, 1998 | Issued |
Array
(
[id] => 6883326
[patent_doc_number] => 20010049798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-12-06
[patent_title] => 'METHOD AND APPARATUS FOR HANDLING DATA ERRORS IN A COMPUTER SYSTEM'
[patent_app_type] => new
[patent_app_number] => 09/224380
[patent_app_country] => US
[patent_app_date] => 1998-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2097
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0049/20010049798.pdf
[firstpage_image] =>[orig_patent_app_number] => 09224380
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/224380 | Method and apparatus for handling data errors in a computer system | Dec 30, 1998 | Issued |
Array
(
[id] => 4324984
[patent_doc_number] => 06327672
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-04
[patent_title] => 'Multiple drive failure tolerant raid system'
[patent_app_type] => 1
[patent_app_number] => 9/224524
[patent_app_country] => US
[patent_app_date] => 1998-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 5541
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/327/06327672.pdf
[firstpage_image] =>[orig_patent_app_number] => 224524
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/224524 | Multiple drive failure tolerant raid system | Dec 30, 1998 | Issued |