Gopal C. Ray

Array ( [id] => 4292876 [patent_doc_number] => 06247141 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Protocol for providing replicated servers in a client-server system' [patent_app_type] => 1 [patent_app_number] => 9/159771 [patent_app_country] => US [patent_app_date] => 1998-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5176 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/247/06247141.pdf [firstpage_image] =>[orig_patent_app_number] => 159771 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4178882 [patent_doc_number] => 06115773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Circuit for detecting improper bus termination on a SCSI bus' [patent_app_type] => 1 [patent_app_number] => 9/159958 [patent_app_country] => US [patent_app_date] => 1998-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5317 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115773.pdf [firstpage_image] =>[orig_patent_app_number] => 159958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1567653 [patent_doc_number] => 06363499 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Method and system for restoring a computer to its original state after an unsuccessful installation attempt' [patent_app_type] => B1 [patent_app_number] => 09/158124 [patent_app_country] => US [patent_app_date] => 1998-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9582 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363499.pdf [firstpage_image] =>[orig_patent_app_number] => 09158124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4178867 [patent_doc_number] => 06115772 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'System and method for host expansion and connection adaptability for a SCSI storage array' [patent_app_type] => 1 [patent_app_number] => 9/156967 [patent_app_country] => US [patent_app_date] => 1998-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6014 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115772.pdf [firstpage_image] =>[orig_patent_app_number] => 156967 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4116010 [patent_doc_number] => 06067596 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Flexible placement of GTL end points using double termination points' [patent_app_type] => 1 [patent_app_number] => 9/153821 [patent_app_country] => US [patent_app_date] => 1998-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4785 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/067/06067596.pdf [firstpage_image] =>[orig_patent_app_number] => 153821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4374662 [patent_doc_number] => 06292910 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Method and apparatus for detecting a bus deadlock in an electronic system' [patent_app_type] => 1 [patent_app_number] => 9/153095 [patent_app_country] => US [patent_app_date] => 1998-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3399 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292910.pdf [firstpage_image] =>[orig_patent_app_number] => 153095 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4209367 [patent_doc_number] => 06154845 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Power failure safe computer architecture' [patent_app_type] => 1 [patent_app_number] => 9/151484 [patent_app_country] => US [patent_app_date] => 1998-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2760 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/154/06154845.pdf [firstpage_image] =>[orig_patent_app_number] => 151484 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4123821 [patent_doc_number] => 06101571 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Circuit configuration for generating an interrupt signal for a microprocessor' [patent_app_type] => 1 [patent_app_number] => 9/149685 [patent_app_country] => US [patent_app_date] => 1998-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3148 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101571.pdf [firstpage_image] =>[orig_patent_app_number] => 149685 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4370799 [patent_doc_number] => 06216185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Personal computer peripheral console with attached computer module' [patent_app_type] => 1 [patent_app_number] => 9/149548 [patent_app_country] => US [patent_app_date] => 1998-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9610 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/216/06216185.pdf [firstpage_image] =>[orig_patent_app_number] => 149548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4370912 [patent_doc_number] => 06216193 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Apparatus and method in a network interface for recovering from complex PCI bus termination conditions' [patent_app_type] => 1 [patent_app_number] => 9/146252 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7690 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/216/06216193.pdf [firstpage_image] =>[orig_patent_app_number] => 146252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4192289 [patent_doc_number] => 06141716 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Interbus data flow control system for realigning data by byte swapping and byte sampling' [patent_app_type] => 1 [patent_app_number] => 9/141578 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2894 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/141/06141716.pdf [firstpage_image] =>[orig_patent_app_number] => 141578 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4238805 [patent_doc_number] => 06088757 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Computer program means and device for conducting high performance locking facility in a loosely coupled environment' [patent_app_type] => 1 [patent_app_number] => 9/141544 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4308 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088757.pdf [firstpage_image] =>[orig_patent_app_number] => 141544 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4256788 [patent_doc_number] => 06081862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Switching system for optimization of signal reflection' [patent_app_type] => 1 [patent_app_number] => 9/140171 [patent_app_country] => US [patent_app_date] => 1998-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2276 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081862.pdf [firstpage_image] =>[orig_patent_app_number] => 140171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4177052 [patent_doc_number] => 06105098 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Method for managing shared resources' [patent_app_type] => 1 [patent_app_number] => 9/139565 [patent_app_country] => US [patent_app_date] => 1998-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 9451 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/105/06105098.pdf [firstpage_image] =>[orig_patent_app_number] => 139565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4118108 [patent_doc_number] => 06098142 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Apparatus and method for using a communications port in polling mode and without interrupts' [patent_app_type] => 1 [patent_app_number] => 9/140074 [patent_app_country] => US [patent_app_date] => 1998-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5195 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/098/06098142.pdf [firstpage_image] =>[orig_patent_app_number] => 140074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4088395 [patent_doc_number] => 06070207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Hot plug connected I/O bus for computer system' [patent_app_type] => 1 [patent_app_number] => 9/137164 [patent_app_country] => US [patent_app_date] => 1998-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7452 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/070/06070207.pdf [firstpage_image] =>[orig_patent_app_number] => 137164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3971014 [patent_doc_number] => 05991887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Low power wake up circuitry, with internal power down of the wake up circuitry itself' [patent_app_type] => 1 [patent_app_number] => 9/136787 [patent_app_country] => US [patent_app_date] => 1998-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2668 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/991/05991887.pdf [firstpage_image] =>[orig_patent_app_number] => 136787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4317448 [patent_doc_number] => 06185639 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'System and method to reduce a computer system\'s interrupt processing overhead' [patent_app_type] => 1 [patent_app_number] => 9/136645 [patent_app_country] => US [patent_app_date] => 1998-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11666 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/185/06185639.pdf [firstpage_image] =>[orig_patent_app_number] => 136645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4138530 [patent_doc_number] => 06073202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Bus switching structure and computer' [patent_app_type] => 1 [patent_app_number] => 9/135729 [patent_app_country] => US [patent_app_date] => 1998-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3570 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/073/06073202.pdf [firstpage_image] =>[orig_patent_app_number] => 135729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4166877 [patent_doc_number] => 06065073 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Auto-polling unit for interrupt generation in a network interface device' [patent_app_type] => 1 [patent_app_number] => 9/135340 [patent_app_country] => US [patent_app_date] => 1998-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 12158 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065073.pdf [firstpage_image] =>[orig_patent_app_number] => 135340 [rel_patent_id] =>[rel_patent_doc_number] =>)