Gopal C. Ray

Array ( [id] => 2632553 [patent_doc_number] => 04956768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-11 [patent_title] => 'Wideband server, in particular for transmitting music or images' [patent_app_type] => 1 [patent_app_number] => 7/159767 [patent_app_country] => US [patent_app_date] => 1988-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3792 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/956/04956768.pdf [firstpage_image] =>[orig_patent_app_number] => 159767 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2612337 [patent_doc_number] => 04931997 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-05 [patent_title] => 'Semiconductor memory having storage buffer to save control data during bulk erase' [patent_app_type] => 1 [patent_app_number] => 7/159193 [patent_app_country] => US [patent_app_date] => 1988-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 43 [patent_no_of_words] => 18798 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/931/04931997.pdf [firstpage_image] =>[orig_patent_app_number] => 159193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2646401 [patent_doc_number] => 04914579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-03 [patent_title] => 'Apparatus for branch prediction for computer instructions' [patent_app_type] => 1 [patent_app_number] => 7/157474 [patent_app_country] => US [patent_app_date] => 1988-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 3851 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/914/04914579.pdf [firstpage_image] =>[orig_patent_app_number] => 157474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2778458 [patent_doc_number] => 04985828 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-15 [patent_title] => 'Method and apparatus for generating a real address multiple virtual address spaces of a storage' [patent_app_type] => 1 [patent_app_number] => 7/156454 [patent_app_country] => US [patent_app_date] => 1988-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2482 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/985/04985828.pdf [firstpage_image] =>[orig_patent_app_number] => 156454 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2605863 [patent_doc_number] => 04965719 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-23 [patent_title] => 'Method for lock management, page coherency, and asynchronous writing of changed pages to shared external store in a distributed computing system' [patent_app_type] => 1 [patent_app_number] => 7/155674 [patent_app_country] => US [patent_app_date] => 1988-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7611 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/965/04965719.pdf [firstpage_image] =>[orig_patent_app_number] => 155674 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2618729 [patent_doc_number] => 04903240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-20 [patent_title] => 'Readout circuit and method for multiphase memory array' [patent_app_type] => 1 [patent_app_number] => 7/156492 [patent_app_country] => US [patent_app_date] => 1988-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1558 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/903/04903240.pdf [firstpage_image] =>[orig_patent_app_number] => 156492 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2754295 [patent_doc_number] => 05003469 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-26 [patent_title] => 'Method and apparatus for processing data in a decentralized processing system' [patent_app_type] => 1 [patent_app_number] => 7/152996 [patent_app_country] => US [patent_app_date] => 1988-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4983 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/003/05003469.pdf [firstpage_image] =>[orig_patent_app_number] => 152996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2704974 [patent_doc_number] => 04991084 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-05 [patent_title] => 'N.times.M round robin order arbitrating switching matrix system' [patent_app_type] => 1 [patent_app_number] => 7/152779 [patent_app_country] => US [patent_app_date] => 1988-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2573 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/991/04991084.pdf [firstpage_image] =>[orig_patent_app_number] => 152779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2635288 [patent_doc_number] => 04951195 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-21 [patent_title] => 'Condition code graph analysis for simulating a CPU processor' [patent_app_type] => 1 [patent_app_number] => 7/151136 [patent_app_country] => US [patent_app_date] => 1988-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 10369 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/951/04951195.pdf [firstpage_image] =>[orig_patent_app_number] => 151136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2571390 [patent_doc_number] => 04945468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-31 [patent_title] => 'Trusted path mechanism for virtual terminal environments' [patent_app_type] => 1 [patent_app_number] => 7/150965 [patent_app_country] => US [patent_app_date] => 1988-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6341 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/945/04945468.pdf [firstpage_image] =>[orig_patent_app_number] => 150965 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2754148 [patent_doc_number] => 05003461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-26 [patent_title] => 'Cluster controller memory arbiter' [patent_app_type] => 1 [patent_app_number] => 7/150870 [patent_app_country] => US [patent_app_date] => 1988-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1379 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/003/05003461.pdf [firstpage_image] =>[orig_patent_app_number] => 150870 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2564399 [patent_doc_number] => 04961132 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-02 [patent_title] => 'System for processing communications among central processing units' [patent_app_type] => 1 [patent_app_number] => 7/150276 [patent_app_country] => US [patent_app_date] => 1988-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2161 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/961/04961132.pdf [firstpage_image] =>[orig_patent_app_number] => 150276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2678333 [patent_doc_number] => 04999807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-12 [patent_title] => 'Data input circuit having latch circuit' [patent_app_type] => 1 [patent_app_number] => 7/148309 [patent_app_country] => US [patent_app_date] => 1988-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3105 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/999/04999807.pdf [firstpage_image] =>[orig_patent_app_number] => 148309 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2648820 [patent_doc_number] => 04939509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-03 [patent_title] => 'Data conferencing arrangement for stations having keyboards and displays, using a keyboard buffer and a screen buffer' [patent_app_type] => 1 [patent_app_number] => 7/148329 [patent_app_country] => US [patent_app_date] => 1988-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5009 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/939/04939509.pdf [firstpage_image] =>[orig_patent_app_number] => 148329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2701988 [patent_doc_number] => 05019962 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-28 [patent_title] => 'Direct memory access controller for a multi-microcomputer system' [patent_app_type] => 1 [patent_app_number] => 7/144523 [patent_app_country] => US [patent_app_date] => 1988-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7363 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/019/05019962.pdf [firstpage_image] =>[orig_patent_app_number] => 144523 [rel_patent_id] =>[rel_patent_doc_number] =>)