Search

Grant S. Withers

Examiner (ID: 18926, Phone: (571)270-1570 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2895, 2817, 2812, 2891
Total Applications
1000
Issued Applications
834
Pending Applications
38
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6400230 [patent_doc_number] => 20100148230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'TRENCH ISOLATION REGIONS IN IMAGE SENSORS' [patent_app_type] => utility [patent_app_number] => 12/332407 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3655 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20100148230.pdf [firstpage_image] =>[orig_patent_app_number] => 12332407 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/332407
TRENCH ISOLATION REGIONS IN IMAGE SENSORS Dec 10, 2008 Abandoned
Array ( [id] => 7751334 [patent_doc_number] => 08110416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-07 [patent_title] => 'AC impedance spectroscopy testing of electrical parametric structures' [patent_app_type] => utility [patent_app_number] => 12/328287 [patent_app_country] => US [patent_app_date] => 2008-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 6947 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/110/08110416.pdf [firstpage_image] =>[orig_patent_app_number] => 12328287 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/328287
AC impedance spectroscopy testing of electrical parametric structures Dec 3, 2008 Issued
Array ( [id] => 5573068 [patent_doc_number] => 20090140429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'Metal interconnection of a semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/292827 [patent_app_country] => US [patent_app_date] => 2008-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20090140429.pdf [firstpage_image] =>[orig_patent_app_number] => 12292827 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/292827
Metal interconnection of a semiconductor device and method of manufacturing the same Nov 25, 2008 Issued
Array ( [id] => 4633583 [patent_doc_number] => 08012028 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-09-06 [patent_title] => 'Modular table support system for gaming machines' [patent_app_type] => utility [patent_app_number] => 12/273750 [patent_app_country] => US [patent_app_date] => 2008-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2128 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/012/08012028.pdf [firstpage_image] =>[orig_patent_app_number] => 12273750 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/273750
Modular table support system for gaming machines Nov 18, 2008 Issued
Array ( [id] => 5278706 [patent_doc_number] => 20090130838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'METHOD OF FORMING CONDUCTIVE BUMPS' [patent_app_type] => utility [patent_app_number] => 12/271228 [patent_app_country] => US [patent_app_date] => 2008-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6090 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20090130838.pdf [firstpage_image] =>[orig_patent_app_number] => 12271228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/271228
METHOD OF FORMING CONDUCTIVE BUMPS Nov 13, 2008 Abandoned
Array ( [id] => 5546114 [patent_doc_number] => 20090155991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'Methods of fabricating a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/292195 [patent_app_country] => US [patent_app_date] => 2008-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4862 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20090155991.pdf [firstpage_image] =>[orig_patent_app_number] => 12292195 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/292195
Methods of fabricating a semiconductor device Nov 12, 2008 Issued
Array ( [id] => 5410173 [patent_doc_number] => 20090124072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING THROUGH ELECTRODE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/270386 [patent_app_country] => US [patent_app_date] => 2008-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4582 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20090124072.pdf [firstpage_image] =>[orig_patent_app_number] => 12270386 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/270386
Semiconductor device having through electrode and method of fabricating the same Nov 12, 2008 Issued
Array ( [id] => 5407386 [patent_doc_number] => 20090121284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/292008 [patent_app_country] => US [patent_app_date] => 2008-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7229 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20090121284.pdf [firstpage_image] =>[orig_patent_app_number] => 12292008 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/292008
Semiconductor device and method for manufacturing the same Nov 9, 2008 Issued
Array ( [id] => 6423027 [patent_doc_number] => 20100102435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'METHOD AND APPARATUS FOR REDUCING SEMICONDUCTOR PACKAGE TENSILE STRESS' [patent_app_type] => utility [patent_app_number] => 12/259357 [patent_app_country] => US [patent_app_date] => 2008-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3301 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20100102435.pdf [firstpage_image] =>[orig_patent_app_number] => 12259357 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/259357
Method and apparatus for reducing semiconductor package tensile stress Oct 27, 2008 Issued
Array ( [id] => 7800966 [patent_doc_number] => 08129236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'Method for creating tensile strain by applying stress memorization techniques at close proximity to the gate electrode' [patent_app_type] => utility [patent_app_number] => 12/257718 [patent_app_country] => US [patent_app_date] => 2008-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 8841 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/129/08129236.pdf [firstpage_image] =>[orig_patent_app_number] => 12257718 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/257718
Method for creating tensile strain by applying stress memorization techniques at close proximity to the gate electrode Oct 23, 2008 Issued
Array ( [id] => 8375206 [patent_doc_number] => 08257997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Semiconductor photodetectors' [patent_app_type] => utility [patent_app_number] => 12/253497 [patent_app_country] => US [patent_app_date] => 2008-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 41 [patent_no_of_words] => 6048 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12253497 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/253497
Semiconductor photodetectors Oct 16, 2008 Issued
Array ( [id] => 6231288 [patent_doc_number] => 20100264498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'MANUFACTURING A MEMS ELEMENT HAVING CANTILEVER AND CAVITY ON A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/682000 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5123 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20100264498.pdf [firstpage_image] =>[orig_patent_app_number] => 12682000 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/682000
Manufacturing a MEMS element having cantilever and cavity on a substrate Oct 14, 2008 Issued
Array ( [id] => 7530335 [patent_doc_number] => 07842557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'Nonvolatile storage device and method of manufacturing the same, and storage device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/249688 [patent_app_country] => US [patent_app_date] => 2008-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 44 [patent_no_of_words] => 14616 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/842/07842557.pdf [firstpage_image] =>[orig_patent_app_number] => 12249688 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/249688
Nonvolatile storage device and method of manufacturing the same, and storage device and method of manufacturing the same Oct 9, 2008 Issued
Array ( [id] => 4564856 [patent_doc_number] => 07846837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Through substrate via process' [patent_app_type] => utility [patent_app_number] => 12/248618 [patent_app_country] => US [patent_app_date] => 2008-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2229 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/846/07846837.pdf [firstpage_image] =>[orig_patent_app_number] => 12248618 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/248618
Through substrate via process Oct 8, 2008 Issued
Array ( [id] => 6624540 [patent_doc_number] => 20100311227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'METHOD FOR PRODUCING SEMICONDUCTOR CHIP WITH ADHESIVE FILM, ADHESIVE FILM FOR SEMICONDUCTOR USED IN THE METHOD, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/682254 [patent_app_country] => US [patent_app_date] => 2008-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8189 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0311/20100311227.pdf [firstpage_image] =>[orig_patent_app_number] => 12682254 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/682254
Method for producing semiconductor chip with adhesive film, adhesive film for semiconductor used in the method, and method for producing semiconductor device Oct 6, 2008 Issued
Array ( [id] => 4775889 [patent_doc_number] => 20080283887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'CMOS Image Sensor' [patent_app_type] => utility [patent_app_number] => 12/174618 [patent_app_country] => US [patent_app_date] => 2008-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3030 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20080283887.pdf [firstpage_image] =>[orig_patent_app_number] => 12174618 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/174618
CMOS Image Sensor Jul 15, 2008 Abandoned
Array ( [id] => 4533595 [patent_doc_number] => 07888208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-15 [patent_title] => 'Method of fabricating non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 12/164879 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2567 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/888/07888208.pdf [firstpage_image] =>[orig_patent_app_number] => 12164879 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/164879
Method of fabricating non-volatile memory device Jun 29, 2008 Issued
Array ( [id] => 5456081 [patent_doc_number] => 20090256233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-15 [patent_title] => 'Isolation Structure in Memory Device and Method for Fabricating the Isolation Structure' [patent_app_type] => utility [patent_app_number] => 12/164579 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9606 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20090256233.pdf [firstpage_image] =>[orig_patent_app_number] => 12164579 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/164579
Isolation structure in memory device and method for fabricating the isolation structure Jun 29, 2008 Issued
Array ( [id] => 8005849 [patent_doc_number] => 08084325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/165129 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3508 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/084/08084325.pdf [firstpage_image] =>[orig_patent_app_number] => 12165129 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/165129
Semiconductor device and method for fabricating the same Jun 29, 2008 Issued
Array ( [id] => 8340030 [patent_doc_number] => 08241953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Method of fabricating stacked wire bonded semiconductor package with low profile bond line' [patent_app_type] => utility [patent_app_number] => 12/165340 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 5603 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12165340 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/165340
Method of fabricating stacked wire bonded semiconductor package with low profile bond line Jun 29, 2008 Issued
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