
Grant S. Withers
Examiner (ID: 18926, Phone: (571)270-1570 , Office: P/2891 )
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2895, 2817, 2812, 2891 |
| Total Applications | 1000 |
| Issued Applications | 834 |
| Pending Applications | 38 |
| Abandoned Applications | 148 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4455781
[patent_doc_number] => 07892919
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[patent_title] => 'Method of forming isolation layer in semiconductor device'
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[pdf_file] => patents/07/892/07892919.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/163328 | Method of forming isolation layer in semiconductor device | Jun 26, 2008 | Issued |
Array
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[patent_title] => 'STRUCTURED LAYER DEPOSITION ON PROCESSED WAFERS USED IN MICROSYSTEM TECHNOLOGY'
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Array
(
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[patent_doc_number] => 07915149
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[patent_issue_date] => 2011-03-29
[patent_title] => 'Gallium nitride substrate and gallium nitride layer formation method'
[patent_app_type] => utility
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[patent_app_date] => 2008-06-10
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Array
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[patent_issue_date] => 2011-09-06
[patent_title] => 'Structure and method to form dual silicide e-fuse'
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Array
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[patent_title] => 'MULTI-CHIP STACK PACKAGE'
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Array
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[patent_title] => 'STRESS ENHANCED TRANSISTOR DEVICES AND METHODS OF MAKING'
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Array
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Array
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[patent_title] => 'High performance LDMOS device having enhanced dielectric strain layer'
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Array
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Array
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Array
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[patent_title] => 'SOI transistor having a carrier recombination structure in a body'
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Array
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Array
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Array
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Array
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