Search

Grant S. Withers

Examiner (ID: 18926, Phone: (571)270-1570 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2895, 2817, 2812, 2891
Total Applications
1000
Issued Applications
834
Pending Applications
38
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 239485 [patent_doc_number] => 07592202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-22 [patent_title] => 'Embedding device in substrate cavity' [patent_app_type] => utility [patent_app_number] => 11/395021 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 4370 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/592/07592202.pdf [firstpage_image] =>[orig_patent_app_number] => 11395021 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/395021
Embedding device in substrate cavity Mar 30, 2006 Issued
Array ( [id] => 7691976 [patent_doc_number] => 20070232057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Method for forming thin film photovoltaic interconnects using self-aligned process' [patent_app_type] => utility [patent_app_number] => 11/394721 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3228 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20070232057.pdf [firstpage_image] =>[orig_patent_app_number] => 11394721 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394721
Method for forming thin film photovoltaic interconnects using self-aligned process Mar 30, 2006 Issued
Array ( [id] => 211476 [patent_doc_number] => 07622382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Filling narrow and high aspect ratio openings with electroless deposition' [patent_app_type] => utility [patent_app_number] => 11/393282 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5939 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/622/07622382.pdf [firstpage_image] =>[orig_patent_app_number] => 11393282 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/393282
Filling narrow and high aspect ratio openings with electroless deposition Mar 28, 2006 Issued
Array ( [id] => 7692082 [patent_doc_number] => 20070231951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Reducing layer count in semiconductor packages' [patent_app_type] => utility [patent_app_number] => 11/393071 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3662 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20070231951.pdf [firstpage_image] =>[orig_patent_app_number] => 11393071 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/393071
Reducing layer count in semiconductor packages Mar 28, 2006 Abandoned
Array ( [id] => 5750869 [patent_doc_number] => 20060220018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Array substrate for in-plane switching liquid crystal display device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/391512 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6171 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20060220018.pdf [firstpage_image] =>[orig_patent_app_number] => 11391512 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/391512
Array substrate for in-plane switching liquid crystal display device and method of fabricating the same Mar 28, 2006 Issued
Array ( [id] => 369833 [patent_doc_number] => 07476606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-13 [patent_title] => 'Eutectic bonding of ultrathin semiconductors' [patent_app_type] => utility [patent_app_number] => 11/390772 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 1611 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/476/07476606.pdf [firstpage_image] =>[orig_patent_app_number] => 11390772 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/390772
Eutectic bonding of ultrathin semiconductors Mar 27, 2006 Issued
Array ( [id] => 4385 [patent_doc_number] => 07811866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Single passivation layer scheme for forming a fuse' [patent_app_type] => utility [patent_app_number] => 11/390951 [patent_app_country] => US [patent_app_date] => 2006-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3244 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/811/07811866.pdf [firstpage_image] =>[orig_patent_app_number] => 11390951 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/390951
Single passivation layer scheme for forming a fuse Mar 26, 2006 Issued
Array ( [id] => 7597689 [patent_doc_number] => 07618888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'Temperature-controlled metallic dry-fill process' [patent_app_type] => utility [patent_app_number] => 11/389511 [patent_app_country] => US [patent_app_date] => 2006-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 13992 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/618/07618888.pdf [firstpage_image] =>[orig_patent_app_number] => 11389511 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/389511
Temperature-controlled metallic dry-fill process Mar 23, 2006 Issued
Array ( [id] => 5754050 [patent_doc_number] => 20060223199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/385332 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5381 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20060223199.pdf [firstpage_image] =>[orig_patent_app_number] => 11385332 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385332
Semiconductor device and manufacturing method thereof Mar 19, 2006 Abandoned
Array ( [id] => 210393 [patent_doc_number] => 07625780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-01 [patent_title] => 'Fluidic heterogeneous microsystems assembly and packaging' [patent_app_type] => utility [patent_app_number] => 11/375701 [patent_app_country] => US [patent_app_date] => 2006-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 7308 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/625/07625780.pdf [firstpage_image] =>[orig_patent_app_number] => 11375701 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/375701
Fluidic heterogeneous microsystems assembly and packaging Mar 13, 2006 Issued
Array ( [id] => 5259181 [patent_doc_number] => 20070212813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'Perforated embedded plane package and method' [patent_app_type] => utility [patent_app_number] => 11/373541 [patent_app_country] => US [patent_app_date] => 2006-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7999 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20070212813.pdf [firstpage_image] =>[orig_patent_app_number] => 11373541 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/373541
Perforated embedded plane package and method Mar 9, 2006 Abandoned
Array ( [id] => 5259168 [patent_doc_number] => 20070212800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'Methods for detecting charge effects during semiconductor processing' [patent_app_type] => utility [patent_app_number] => 11/370362 [patent_app_country] => US [patent_app_date] => 2006-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2453 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20070212800.pdf [firstpage_image] =>[orig_patent_app_number] => 11370362 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/370362
Methods for detecting charge effects during semiconductor processing Mar 7, 2006 Abandoned
Array ( [id] => 5628831 [patent_doc_number] => 20060145299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Method for improving the electrical properties of active bipolar components' [patent_app_type] => utility [patent_app_number] => 11/352312 [patent_app_country] => US [patent_app_date] => 2006-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 10426 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20060145299.pdf [firstpage_image] =>[orig_patent_app_number] => 11352312 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/352312
Method for improving the electrical properties of active bipolar components Feb 12, 2006 Abandoned
Array ( [id] => 4614196 [patent_doc_number] => 07989881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Semiconductor device structure with a tapered field plate and cylindrical drift region geometry' [patent_app_type] => utility [patent_app_number] => 11/815861 [patent_app_country] => US [patent_app_date] => 2006-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2416 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989881.pdf [firstpage_image] =>[orig_patent_app_number] => 11815861 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/815861
Semiconductor device structure with a tapered field plate and cylindrical drift region geometry Feb 6, 2006 Issued
Array ( [id] => 5754070 [patent_doc_number] => 20060223219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Method of depositing polythiophene semiconductor on a substrate' [patent_app_type] => utility [patent_app_number] => 11/336778 [patent_app_country] => US [patent_app_date] => 2006-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3734 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20060223219.pdf [firstpage_image] =>[orig_patent_app_number] => 11336778 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/336778
Method of depositing polythiophene semiconductor on a substrate Jan 22, 2006 Issued
Array ( [id] => 5596348 [patent_doc_number] => 20060160265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Method of manufacturing photoelectric conversion element, photoelectric conversion element, and electronic apparatus' [patent_app_type] => utility [patent_app_number] => 11/331122 [patent_app_country] => US [patent_app_date] => 2006-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 15248 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20060160265.pdf [firstpage_image] =>[orig_patent_app_number] => 11331122 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/331122
Method of manufacturing photoelectric conversion element, photoelectric conversion element, and electronic apparatus Jan 12, 2006 Abandoned
Array ( [id] => 5628731 [patent_doc_number] => 20060145199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Thin film layer, heating electrode, phase change memory including thin film layer and methods for forming the same' [patent_app_type] => utility [patent_app_number] => 11/324381 [patent_app_country] => US [patent_app_date] => 2006-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5037 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20060145199.pdf [firstpage_image] =>[orig_patent_app_number] => 11324381 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/324381
Thin film layer, heating electrode, phase change memory including thin film layer and methods for forming the same Jan 3, 2006 Issued
Array ( [id] => 5193939 [patent_doc_number] => 20070082423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Method of fabricating CMOS image sensor' [patent_app_type] => utility [patent_app_number] => 11/322848 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2953 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20070082423.pdf [firstpage_image] =>[orig_patent_app_number] => 11322848 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/322848
Method of fabricating CMOS image sensor Dec 29, 2005 Issued
Array ( [id] => 5655417 [patent_doc_number] => 20060141152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'CVD apparatus and manufacturing method of semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 11/317772 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20060141152.pdf [firstpage_image] =>[orig_patent_app_number] => 11317772 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/317772
CVD apparatus and manufacturing method of semiconductor device using the same Dec 22, 2005 Abandoned
Array ( [id] => 185254 [patent_doc_number] => 07645699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-12 [patent_title] => 'Method of forming a diffusion barrier layer using a TaSiN layer and method of forming a metal interconnection line using the same' [patent_app_type] => utility [patent_app_number] => 11/317362 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2231 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/645/07645699.pdf [firstpage_image] =>[orig_patent_app_number] => 11317362 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/317362
Method of forming a diffusion barrier layer using a TaSiN layer and method of forming a metal interconnection line using the same Dec 22, 2005 Issued
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