Search

Granvill D. Lee

Examiner (ID: 12333)

Most Active Art Unit
2825
Art Unit(s)
2825, 2891, 2829
Total Applications
333
Issued Applications
315
Pending Applications
6
Abandoned Applications
12

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1241159 [patent_doc_number] => 06682982 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-27 [patent_title] => 'Process method for 1T-SRAM' [patent_app_type] => B1 [patent_app_number] => 10/263540 [patent_app_country] => US [patent_app_date] => 2002-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 2822 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 446 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/682/06682982.pdf [firstpage_image] =>[orig_patent_app_number] => 10263540 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263540
Process method for 1T-SRAM Oct 2, 2002 Issued
Array ( [id] => 951335 [patent_doc_number] => 06960537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'Incorporation of nitrogen into high k dielectric film' [patent_app_type] => utility [patent_app_number] => 10/260370 [patent_app_country] => US [patent_app_date] => 2002-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 12289 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/960/06960537.pdf [firstpage_image] =>[orig_patent_app_number] => 10260370 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/260370
Incorporation of nitrogen into high k dielectric film Sep 25, 2002 Issued
Array ( [id] => 1107805 [patent_doc_number] => 06809042 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-26 [patent_title] => 'Oxide superconductor thick film and method for manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 10/227440 [patent_app_country] => US [patent_app_date] => 2002-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6307 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/809/06809042.pdf [firstpage_image] =>[orig_patent_app_number] => 10227440 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/227440
Oxide superconductor thick film and method for manufacturing the same Aug 25, 2002 Issued
Array ( [id] => 6753472 [patent_doc_number] => 20030001248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Stress-relieving heatsink structure and method of attachment to an electronic package' [patent_app_type] => new [patent_app_number] => 10/225860 [patent_app_country] => US [patent_app_date] => 2002-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3215 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20030001248.pdf [firstpage_image] =>[orig_patent_app_number] => 10225860 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/225860
Stress-relieving heatsink structure and method of attachment to an electronic package Aug 21, 2002 Issued
Array ( [id] => 1230000 [patent_doc_number] => 06692613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-17 [patent_title] => 'Reactor for processing a semiconductor wafer' [patent_app_type] => B2 [patent_app_number] => 10/223974 [patent_app_country] => US [patent_app_date] => 2002-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 33 [patent_no_of_words] => 12525 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/692/06692613.pdf [firstpage_image] =>[orig_patent_app_number] => 10223974 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/223974
Reactor for processing a semiconductor wafer Aug 19, 2002 Issued
Array ( [id] => 7413633 [patent_doc_number] => 20040025134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Method and apparatus for assigning nets to metal layers during circuit routing' [patent_app_type] => new [patent_app_number] => 10/211632 [patent_app_country] => US [patent_app_date] => 2002-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2361 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20040025134.pdf [firstpage_image] =>[orig_patent_app_number] => 10211632 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/211632
Method and apparatus for assigning nets to metal layers during circuit routing Aug 1, 2002 Issued
Array ( [id] => 6252420 [patent_doc_number] => 20020185163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-12 [patent_title] => 'Reactor for processing a semiconductor wafer' [patent_app_type] => new [patent_app_number] => 10/202074 [patent_app_country] => US [patent_app_date] => 2002-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 12635 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20020185163.pdf [firstpage_image] =>[orig_patent_app_number] => 10202074 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/202074
Reactor for processing a semiconductor wafer Jul 22, 2002 Issued
Array ( [id] => 6688527 [patent_doc_number] => 20030032252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'AlGaAs or InGaP low turn-on voltage GaAs-based heterojunction bipolar transistor' [patent_app_type] => new [patent_app_number] => 10/201760 [patent_app_country] => US [patent_app_date] => 2002-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7520 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20030032252.pdf [firstpage_image] =>[orig_patent_app_number] => 10201760 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/201760
AlGaAs or InGaP low turn-on voltage GaAs-based heterojunction bipolar transistor Jul 21, 2002 Issued
Array ( [id] => 6671211 [patent_doc_number] => 20030056814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Sonic immersion process system and methods' [patent_app_type] => new [patent_app_number] => 10/200043 [patent_app_country] => US [patent_app_date] => 2002-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3253 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20030056814.pdf [firstpage_image] =>[orig_patent_app_number] => 10200043 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/200043
Sonic immersion process system and methods Jul 18, 2002 Issued
Array ( [id] => 7365785 [patent_doc_number] => 20040005775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Method for depositing an adhesion/barrier layer to improve adhesion and contact resistance' [patent_app_type] => new [patent_app_number] => 10/190140 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20040005775.pdf [firstpage_image] =>[orig_patent_app_number] => 10190140 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190140
Method for depositing an adhesion/barrier layer to improve adhesion and contact resistance Jul 2, 2002 Issued
Array ( [id] => 1241143 [patent_doc_number] => 06682966 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-27 [patent_title] => 'Semiconductor device and method for producing the same' [patent_app_type] => B2 [patent_app_number] => 10/171540 [patent_app_country] => US [patent_app_date] => 2002-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 78 [patent_no_of_words] => 19831 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/682/06682966.pdf [firstpage_image] =>[orig_patent_app_number] => 10171540 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/171540
Semiconductor device and method for producing the same Jun 16, 2002 Issued
Array ( [id] => 1156313 [patent_doc_number] => 06762116 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-13 [patent_title] => 'System and method for fabricating microcomponent parts on a substrate having pre-fabricated electronic circuitry thereon' [patent_app_type] => B1 [patent_app_number] => 10/167939 [patent_app_country] => US [patent_app_date] => 2002-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3873 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762116.pdf [firstpage_image] =>[orig_patent_app_number] => 10167939 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167939
System and method for fabricating microcomponent parts on a substrate having pre-fabricated electronic circuitry thereon Jun 11, 2002 Issued
Array ( [id] => 1303156 [patent_doc_number] => 06620741 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Method for controlling etch bias of carbon doped oxide films' [patent_app_type] => B1 [patent_app_number] => 10/166150 [patent_app_country] => US [patent_app_date] => 2002-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4223 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/620/06620741.pdf [firstpage_image] =>[orig_patent_app_number] => 10166150 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/166150
Method for controlling etch bias of carbon doped oxide films Jun 9, 2002 Issued
Array ( [id] => 1075214 [patent_doc_number] => 06839882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Method and apparatus for design of integrated circuits' [patent_app_type] => utility [patent_app_number] => 10/162536 [patent_app_country] => US [patent_app_date] => 2002-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5742 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/839/06839882.pdf [firstpage_image] =>[orig_patent_app_number] => 10162536 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/162536
Method and apparatus for design of integrated circuits Jun 2, 2002 Issued
Array ( [id] => 1034420 [patent_doc_number] => 06875629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-05 [patent_title] => 'III group nitride based semiconductor element and method for manufacture thereof' [patent_app_type] => utility [patent_app_number] => 10/479590 [patent_app_country] => US [patent_app_date] => 2002-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4700 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/875/06875629.pdf [firstpage_image] =>[orig_patent_app_number] => 10479590 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/479590
III group nitride based semiconductor element and method for manufacture thereof Jun 2, 2002 Issued
Array ( [id] => 6746753 [patent_doc_number] => 20030023936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Method and apparatus for integrated circuit design with a software tool' [patent_app_type] => new [patent_app_number] => 10/162123 [patent_app_country] => US [patent_app_date] => 2002-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5945 [patent_no_of_claims] => 173 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20030023936.pdf [firstpage_image] =>[orig_patent_app_number] => 10162123 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/162123
Method and apparatus for integrated circuit design with a software tool Jun 2, 2002 Issued
Array ( [id] => 1030749 [patent_doc_number] => 06883156 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-19 [patent_title] => 'Apparatus and method for relative position annotation of standard cell components to facilitate datapath design' [patent_app_type] => utility [patent_app_number] => 10/159818 [patent_app_country] => US [patent_app_date] => 2002-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5738 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/883/06883156.pdf [firstpage_image] =>[orig_patent_app_number] => 10159818 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/159818
Apparatus and method for relative position annotation of standard cell components to facilitate datapath design May 30, 2002 Issued
Array ( [id] => 6423995 [patent_doc_number] => 20020174959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Plate member separating apparatus and method' [patent_app_type] => new [patent_app_number] => 10/152830 [patent_app_country] => US [patent_app_date] => 2002-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20020174959.pdf [firstpage_image] =>[orig_patent_app_number] => 10152830 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/152830
Plate member separating apparatus and method May 22, 2002 Issued
Array ( [id] => 1107675 [patent_doc_number] => 06808992 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-26 [patent_title] => 'Method and system for tailoring core and periphery cells in a nonvolatile memory' [patent_app_type] => B1 [patent_app_number] => 10/150240 [patent_app_country] => US [patent_app_date] => 2002-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2678 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/808/06808992.pdf [firstpage_image] =>[orig_patent_app_number] => 10150240 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/150240
Method and system for tailoring core and periphery cells in a nonvolatile memory May 14, 2002 Issued
Array ( [id] => 1101564 [patent_doc_number] => 06815248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-09 [patent_title] => 'Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in MRAM processing' [patent_app_type] => B2 [patent_app_number] => 10/124950 [patent_app_country] => US [patent_app_date] => 2002-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 5460 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815248.pdf [firstpage_image] =>[orig_patent_app_number] => 10124950 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/124950
Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in MRAM processing Apr 17, 2002 Issued
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