
Gregory A. Andoll
Examiner (ID: 11349)
| Most Active Art Unit | 2914 |
| Art Unit(s) | 2904, 2914, 2900, 3209 |
| Total Applications | 3312 |
| Issued Applications | 3295 |
| Pending Applications | 0 |
| Abandoned Applications | 17 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19821127
[patent_doc_number] => 20250079334
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-06
[patent_title] => REINFORCEMENT STRUCTURES FOR MULTI-DIE SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/457523
[patent_app_country] => US
[patent_app_date] => 2023-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10756
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18457523
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/457523 | REINFORCEMENT STRUCTURES FOR MULTI-DIE SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAME | Aug 28, 2023 | Pending |
Array
(
[id] => 19191441
[patent_doc_number] => 20240170354
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/448748
[patent_app_country] => US
[patent_app_date] => 2023-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3406
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448748
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/448748 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Aug 10, 2023 | Pending |
Array
(
[id] => 19575317
[patent_doc_number] => 20240379609
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/357459
[patent_app_country] => US
[patent_app_date] => 2023-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3332
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357459
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/357459 | ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF | Jul 23, 2023 | Pending |
Array
(
[id] => 18757544
[patent_doc_number] => 20230361007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/351253
[patent_app_country] => US
[patent_app_date] => 2023-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15336
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18351253
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/351253 | SEMICONDUCTOR DEVICE | Jul 11, 2023 | Pending |
Array
(
[id] => 18906106
[patent_doc_number] => 20240021591
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-18
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/217655
[patent_app_country] => US
[patent_app_date] => 2023-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7736
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18217655
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/217655 | SEMICONDUCTOR PACKAGE | Jul 2, 2023 | Pending |
Array
(
[id] => 19688053
[patent_doc_number] => 20250006598
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-02
[patent_title] => SEMICONDUCTOR DEVICE WITH LEADFRAME SPACER AND METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 18/342809
[patent_app_country] => US
[patent_app_date] => 2023-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3672
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342809
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/342809 | SEMICONDUCTOR DEVICE WITH LEADFRAME SPACER AND METHOD THEREFOR | Jun 27, 2023 | Pending |
Array
(
[id] => 18943611
[patent_doc_number] => 20240038750
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => SEMICONDUCTOR MODULE
[patent_app_type] => utility
[patent_app_number] => 18/343117
[patent_app_country] => US
[patent_app_date] => 2023-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7985
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18343117
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/343117 | SEMICONDUCTOR MODULE | Jun 27, 2023 | Pending |
Array
(
[id] => 18712894
[patent_doc_number] => 20230335527
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-19
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/341157
[patent_app_country] => US
[patent_app_date] => 2023-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7255
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341157
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/341157 | SEMICONDUCTOR DEVICE | Jun 25, 2023 | Pending |
Array
(
[id] => 18882970
[patent_doc_number] => 20240006339
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-04
[patent_title] => CHIP PACKAGE WITH HEAT DISSIPATION PLATE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/213943
[patent_app_country] => US
[patent_app_date] => 2023-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6087
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213943
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/213943 | CHIP PACKAGE WITH HEAT DISSIPATION PLATE AND MANUFACTURING METHOD THEREOF | Jun 25, 2023 | Pending |
Array
(
[id] => 19023178
[patent_doc_number] => 20240079349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-07
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/334578
[patent_app_country] => US
[patent_app_date] => 2023-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8707
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18334578
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/334578 | SEMICONDUCTOR PACKAGE | Jun 13, 2023 | Pending |
Array
(
[id] => 18865904
[patent_doc_number] => 20230420341
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => POWER MODULE FOR HALF-BRIDGE CIRCUIT WITH SCALABLE ARCHITECTURE AND IMPROVED LAYOUT
[patent_app_type] => utility
[patent_app_number] => 18/331837
[patent_app_country] => US
[patent_app_date] => 2023-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7412
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331837
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/331837 | POWER MODULE FOR HALF-BRIDGE CIRCUIT WITH SCALABLE ARCHITECTURE AND IMPROVED LAYOUT | Jun 7, 2023 | Pending |
Array
(
[id] => 18821108
[patent_doc_number] => 20230395449
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-07
[patent_title] => METHOD AND APPARATUS FOR FORMING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/328795
[patent_app_country] => US
[patent_app_date] => 2023-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4933
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18328795
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/328795 | METHOD AND APPARATUS FOR FORMING SEMICONDUCTOR DEVICE | Jun 4, 2023 | Pending |
Array
(
[id] => 19575288
[patent_doc_number] => 20240379580
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => Semiconductor Device and Method of Forming Shielding Material Containing Conductive Spheres
[patent_app_type] => utility
[patent_app_number] => 18/314571
[patent_app_country] => US
[patent_app_date] => 2023-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4492
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18314571
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/314571 | Semiconductor Device and Method of Forming Shielding Material Containing Conductive Spheres | May 8, 2023 | Pending |
Array
(
[id] => 19559927
[patent_doc_number] => 20240371719
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => Semiconductor Device and Method of Controlling Distribution of Liquid Metal TIM Using Lid Structure
[patent_app_type] => utility
[patent_app_number] => 18/311473
[patent_app_country] => US
[patent_app_date] => 2023-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3866
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18311473
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/311473 | Semiconductor Device and Method of Controlling Distribution of Liquid Metal TIM Using Lid Structure | May 2, 2023 | Pending |
Array
(
[id] => 19500391
[patent_doc_number] => 20240339409
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => TRANSISTOR WITH SOURCE MANIFOLD IN NON-ACTIVE DIE REGION
[patent_app_type] => utility
[patent_app_number] => 18/296786
[patent_app_country] => US
[patent_app_date] => 2023-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13832
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18296786
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/296786 | TRANSISTOR WITH SOURCE MANIFOLD IN NON-ACTIVE DIE REGION | Apr 5, 2023 | Pending |
Array
(
[id] => 19452754
[patent_doc_number] => 20240312884
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => Semiconductor Device and Method of Forming Fine Pitch Conductive Posts with Graphene-Coated Cores
[patent_app_type] => utility
[patent_app_number] => 18/184649
[patent_app_country] => US
[patent_app_date] => 2023-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4135
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184649
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/184649 | Semiconductor Device and Method of Forming Fine Pitch Conductive Posts with Graphene-Coated Cores | Mar 14, 2023 | Pending |
Array
(
[id] => 19407174
[patent_doc_number] => 20240290685
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => TERMINAL INTERPOSERS WITH MOLD FLOW CHANNELS, CIRCUIT MODULES INCLUDING SUCH TERMINAL INTERPOSERS, AND ASSOCIATED METHODS
[patent_app_type] => utility
[patent_app_number] => 18/175559
[patent_app_country] => US
[patent_app_date] => 2023-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16209
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18175559
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/175559 | TERMINAL INTERPOSERS WITH MOLD FLOW CHANNELS, CIRCUIT MODULES INCLUDING SUCH TERMINAL INTERPOSERS, AND ASSOCIATED METHODS | Feb 27, 2023 | Pending |
Array
(
[id] => 18540867
[patent_doc_number] => 20230245978
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-03
[patent_title] => SHIELDED WAFER LEVEL CHIP SCALE PACKAGE WITH SHIELD CONNECTED TO GROUND WITH VIAS THROUGH DIE
[patent_app_type] => utility
[patent_app_number] => 18/162481
[patent_app_country] => US
[patent_app_date] => 2023-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6127
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162481
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/162481 | SHIELDED WAFER LEVEL CHIP SCALE PACKAGE WITH SHIELD CONNECTED TO GROUND WITH VIAS THROUGH DIE | Jan 30, 2023 | Pending |
Array
(
[id] => 19252915
[patent_doc_number] => 20240203912
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => AMPLIFIER MODULES AND SYSTEMS WITH GROUND TERMINALS ADJACENT TO POWER AMPLIFIER DIE
[patent_app_type] => utility
[patent_app_number] => 18/067788
[patent_app_country] => US
[patent_app_date] => 2022-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11782
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18067788
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/067788 | AMPLIFIER MODULES AND SYSTEMS WITH GROUND TERMINALS ADJACENT TO POWER AMPLIFIER DIE | Dec 18, 2022 | Pending |
Array
(
[id] => 19221509
[patent_doc_number] => 20240186213
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-06
[patent_title] => ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/076245
[patent_app_country] => US
[patent_app_date] => 2022-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8092
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18076245
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/076245 | ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES | Dec 5, 2022 | Pending |