
Gregory A. Blankenship
Examiner (ID: 3840, Phone: (571)272-6656 , Office: P/3612 )
| Most Active Art Unit | 3612 |
| Art Unit(s) | 3612 |
| Total Applications | 2688 |
| Issued Applications | 2240 |
| Pending Applications | 162 |
| Abandoned Applications | 332 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 632949
[patent_doc_number] => 07133819
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-11-07
[patent_title] => 'Method for adaptive critical path delay estimation during timing-driven placement for hierarchical programmable logic devices'
[patent_app_type] => utility
[patent_app_number] => 09/783246
[patent_app_country] => US
[patent_app_date] => 2001-02-13
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/133/07133819.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/783246 | Method for adaptive critical path delay estimation during timing-driven placement for hierarchical programmable logic devices | Feb 12, 2001 | Issued |
Array
(
[id] => 658549
[patent_doc_number] => 07110927
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[patent_kind] => B1
[patent_issue_date] => 2006-09-19
[patent_title] => 'Finite impulse response (FIR) filter compiler'
[patent_app_type] => utility
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[pdf_file] => patents/07/110/07110927.pdf
[firstpage_image] =>[orig_patent_app_number] => 09773853
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Array
(
[id] => 6889775
[patent_doc_number] => 20010025230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-27
[patent_title] => 'Electric Characteristic evaluating apparatus for a semiconductor device'
[patent_app_type] => new
[patent_app_number] => 09/772728
[patent_app_country] => US
[patent_app_date] => 2001-01-30
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Array
(
[id] => 6814627
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[patent_issue_date] => 2003-04-17
[patent_title] => 'System, method and article of manufacture for a simulator plug-in for co-simulation purposes'
[patent_app_type] => new
[patent_app_number] => 09/772557
[patent_app_country] => US
[patent_app_date] => 2001-01-29
[patent_effective_date] => 0000-00-00
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Array
(
[id] => 7281925
[patent_doc_number] => 20040064302
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[patent_issue_date] => 2004-04-01
[patent_title] => 'Emulation method for managing a reader for a chip card incompatible with an environment'
[patent_app_type] => new
[patent_app_number] => 09/772298
[patent_app_country] => US
[patent_app_date] => 2001-01-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/772298 | Emulation method for managing a reader for a chip card incompatible with an environment | Jan 28, 2001 | Abandoned |
Array
(
[id] => 6654141
[patent_doc_number] => 20030105620
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[patent_kind] => A1
[patent_issue_date] => 2003-06-05
[patent_title] => 'System, method and article of manufacture for interface constructs in a programming language capable of programming hardware architetures'
[patent_app_type] => new
[patent_app_number] => 09/772555
[patent_app_country] => US
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Array
(
[id] => 5991022
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[patent_issue_date] => 2002-07-25
[patent_title] => 'Application personality'
[patent_app_type] => new
[patent_app_number] => 09/768037
[patent_app_country] => US
[patent_app_date] => 2001-01-22
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[patent_drawing_sheets_cnt] => 6
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[firstpage_image] =>[orig_patent_app_number] => 09768037
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/768037 | Application personality | Jan 21, 2001 | Abandoned |
Array
(
[id] => 6886955
[patent_doc_number] => 20010020224
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-06
[patent_title] => 'Logic emulation processor and module unit thereof'
[patent_app_type] => new
[patent_app_number] => 09/764284
[patent_app_country] => US
[patent_app_date] => 2001-01-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/764284 | Logic emulation processor and module unit thereof | Jan 18, 2001 | Abandoned |
Array
(
[id] => 6894442
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[patent_issue_date] => 2001-08-23
[patent_title] => 'Computer-implemented simulation method and apparatus'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/761600 | Computer-implemented simulation method and apparatus | Jan 15, 2001 | Abandoned |
Array
(
[id] => 6998662
[patent_doc_number] => 20010052766
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-12-20
[patent_title] => 'Apparatus for simulating electrical components'
[patent_app_type] => new
[patent_app_number] => 09/759603
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[patent_app_date] => 2001-01-16
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Array
(
[id] => 6226872
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[patent_title] => 'Method for locating functional mistakes in digital circuit designs'
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Array
(
[id] => 637128
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[patent_title] => 'Simulation-based functional verification of microcircuit designs'
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Array
(
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[patent_title] => 'Support system, and computer-readable recording medium in which support program is recorded'
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Array
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Array
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Array
(
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Array
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Array
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Array
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