Search

Gregory A. Blankenship

Examiner (ID: 3840, Phone: (571)272-6656 , Office: P/3612 )

Most Active Art Unit
3612
Art Unit(s)
3612
Total Applications
2688
Issued Applications
2240
Pending Applications
162
Abandoned Applications
332

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 632949 [patent_doc_number] => 07133819 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-11-07 [patent_title] => 'Method for adaptive critical path delay estimation during timing-driven placement for hierarchical programmable logic devices' [patent_app_type] => utility [patent_app_number] => 09/783246 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7735 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/133/07133819.pdf [firstpage_image] =>[orig_patent_app_number] => 09783246 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/783246
Method for adaptive critical path delay estimation during timing-driven placement for hierarchical programmable logic devices Feb 12, 2001 Issued
Array ( [id] => 658549 [patent_doc_number] => 07110927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-09-19 [patent_title] => 'Finite impulse response (FIR) filter compiler' [patent_app_type] => utility [patent_app_number] => 09/773853 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7662 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/110/07110927.pdf [firstpage_image] =>[orig_patent_app_number] => 09773853 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/773853
Finite impulse response (FIR) filter compiler Jan 30, 2001 Issued
Array ( [id] => 6889775 [patent_doc_number] => 20010025230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-27 [patent_title] => 'Electric Characteristic evaluating apparatus for a semiconductor device' [patent_app_type] => new [patent_app_number] => 09/772728 [patent_app_country] => US [patent_app_date] => 2001-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4524 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20010025230.pdf [firstpage_image] =>[orig_patent_app_number] => 09772728 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772728
Electric Characteristic evaluating apparatus for a semiconductor device Jan 29, 2001 Abandoned
Array ( [id] => 6814627 [patent_doc_number] => 20030074177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'System, method and article of manufacture for a simulator plug-in for co-simulation purposes' [patent_app_type] => new [patent_app_number] => 09/772557 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 130 [patent_figures_cnt] => 130 [patent_no_of_words] => 129428 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20030074177.pdf [firstpage_image] =>[orig_patent_app_number] => 09772557 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772557
System, method and article of manufacture for a simulator plug-in for co-simulation purposes Jan 28, 2001 Abandoned
Array ( [id] => 7281925 [patent_doc_number] => 20040064302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Emulation method for managing a reader for a chip card incompatible with an environment' [patent_app_type] => new [patent_app_number] => 09/772298 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1481 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20040064302.pdf [firstpage_image] =>[orig_patent_app_number] => 09772298 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772298
Emulation method for managing a reader for a chip card incompatible with an environment Jan 28, 2001 Abandoned
Array ( [id] => 6654141 [patent_doc_number] => 20030105620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'System, method and article of manufacture for interface constructs in a programming language capable of programming hardware architetures' [patent_app_type] => new [patent_app_number] => 09/772555 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 130 [patent_figures_cnt] => 130 [patent_no_of_words] => 130592 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105620.pdf [firstpage_image] =>[orig_patent_app_number] => 09772555 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772555
System, method and article of manufacture for interface constructs in a programming language capable of programming hardware architetures Jan 28, 2001 Abandoned
Array ( [id] => 5991022 [patent_doc_number] => 20020100034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Application personality' [patent_app_type] => new [patent_app_number] => 09/768037 [patent_app_country] => US [patent_app_date] => 2001-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8776 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20020100034.pdf [firstpage_image] =>[orig_patent_app_number] => 09768037 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/768037
Application personality Jan 21, 2001 Abandoned
Array ( [id] => 6886955 [patent_doc_number] => 20010020224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-06 [patent_title] => 'Logic emulation processor and module unit thereof' [patent_app_type] => new [patent_app_number] => 09/764284 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5751 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20010020224.pdf [firstpage_image] =>[orig_patent_app_number] => 09764284 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/764284
Logic emulation processor and module unit thereof Jan 18, 2001 Abandoned
Array ( [id] => 6894442 [patent_doc_number] => 20010016808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Computer-implemented simulation method and apparatus' [patent_app_type] => new [patent_app_number] => 09/761600 [patent_app_country] => US [patent_app_date] => 2001-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4998 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016808.pdf [firstpage_image] =>[orig_patent_app_number] => 09761600 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/761600
Computer-implemented simulation method and apparatus Jan 15, 2001 Abandoned
Array ( [id] => 6998662 [patent_doc_number] => 20010052766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-20 [patent_title] => 'Apparatus for simulating electrical components' [patent_app_type] => new [patent_app_number] => 09/759603 [patent_app_country] => US [patent_app_date] => 2001-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4061 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20010052766.pdf [firstpage_image] =>[orig_patent_app_number] => 09759603 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/759603
Apparatus for simulating electrical components Jan 15, 2001 Abandoned
Array ( [id] => 6226872 [patent_doc_number] => 20020004919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-10 [patent_title] => 'Method for locating functional mistakes in digital circuit designs' [patent_app_type] => new [patent_app_number] => 09/759414 [patent_app_country] => US [patent_app_date] => 2001-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4743 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20020004919.pdf [firstpage_image] =>[orig_patent_app_number] => 09759414 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/759414
Method for locating functional mistakes in digital circuit designs Jan 12, 2001 Issued
Array ( [id] => 637128 [patent_doc_number] => 07130783 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-31 [patent_title] => 'Simulation-based functional verification of microcircuit designs' [patent_app_type] => utility [patent_app_number] => 09/760063 [patent_app_country] => US [patent_app_date] => 2001-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11337 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/130/07130783.pdf [firstpage_image] =>[orig_patent_app_number] => 09760063 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/760063
Simulation-based functional verification of microcircuit designs Jan 11, 2001 Issued
Array ( [id] => 6894441 [patent_doc_number] => 20010016807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Support system, and computer-readable recording medium in which support program is recorded' [patent_app_type] => new [patent_app_number] => 09/754301 [patent_app_country] => US [patent_app_date] => 2001-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 76 [patent_no_of_words] => 31103 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016807.pdf [firstpage_image] =>[orig_patent_app_number] => 09754301 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/754301
Support system, and computer-readable recording medium in which support program is recorded Jan 4, 2001 Issued
Array ( [id] => 5890423 [patent_doc_number] => 20020013932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-31 [patent_title] => 'Continuous parametric model for circuit simulation' [patent_app_type] => new [patent_app_number] => 09/754811 [patent_app_country] => US [patent_app_date] => 2001-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2832 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20020013932.pdf [firstpage_image] =>[orig_patent_app_number] => 09754811 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/754811
Continuous parametric model for circuit simulation Jan 3, 2001 Abandoned
Array ( [id] => 492869 [patent_doc_number] => 07219048 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-15 [patent_title] => 'Methodology and applications of timing-driven logic resynthesis for VLSI circuits' [patent_app_type] => utility [patent_app_number] => 09/754406 [patent_app_country] => US [patent_app_date] => 2001-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11414 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/219/07219048.pdf [firstpage_image] =>[orig_patent_app_number] => 09754406 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/754406
Methodology and applications of timing-driven logic resynthesis for VLSI circuits Jan 1, 2001 Issued
Array ( [id] => 511170 [patent_doc_number] => 07206729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Inertial field generator: a method for controllably coupling kinematic character motions to dynamically simulated elements' [patent_app_type] => utility [patent_app_number] => 09/750100 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/206/07206729.pdf [firstpage_image] =>[orig_patent_app_number] => 09750100 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/750100
Inertial field generator: a method for controllably coupling kinematic character motions to dynamically simulated elements Dec 28, 2000 Issued
Array ( [id] => 675516 [patent_doc_number] => 07092864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Signal override for simulation models' [patent_app_type] => utility [patent_app_number] => 09/751803 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 33 [patent_no_of_words] => 23336 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/092/07092864.pdf [firstpage_image] =>[orig_patent_app_number] => 09751803 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751803
Signal override for simulation models Dec 28, 2000 Issued
Array ( [id] => 738553 [patent_doc_number] => 07039574 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-02 [patent_title] => 'Naming and managing simulation model events' [patent_app_type] => utility [patent_app_number] => 09/751802 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 18435 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/039/07039574.pdf [firstpage_image] =>[orig_patent_app_number] => 09751802 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751802
Naming and managing simulation model events Dec 28, 2000 Issued
Array ( [id] => 5860646 [patent_doc_number] => 20020123870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Method and system for analyzing performance of a turbine' [patent_app_type] => new [patent_app_number] => 09/749303 [patent_app_country] => US [patent_app_date] => 2000-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4994 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20020123870.pdf [firstpage_image] =>[orig_patent_app_number] => 09749303 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/749303
Method and system for analyzing performance of a turbine Dec 26, 2000 Issued
Array ( [id] => 6347256 [patent_doc_number] => 20020035462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-21 [patent_title] => 'Method of and device for simulation' [patent_app_type] => new [patent_app_number] => 09/740901 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8320 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20020035462.pdf [firstpage_image] =>[orig_patent_app_number] => 09740901 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740901
Method of and device for simulation Dec 20, 2000 Abandoned
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