Search

Gregory A. Pollock

Examiner (ID: 5843, Phone: (571)270-1465 , Office: P/3695 )

Most Active Art Unit
3695
Art Unit(s)
3694, 3695, 3691, 3693
Total Applications
694
Issued Applications
71
Pending Applications
52
Abandoned Applications
574

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19696451 [patent_doc_number] => 20250014996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/760040 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14997 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18760040 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/760040
SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR STORAGE DEVICE Jun 30, 2024 Pending
Array ( [id] => 20352813 [patent_doc_number] => 20250349665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/657578 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657578 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657578
PACKAGE AND MANUFACTURING METHOD THEREOF May 6, 2024 Pending
Array ( [id] => 19575250 [patent_doc_number] => 20240379542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => SEMICONDUCTOR DEVICE HAVING RESISTANCE UNITS [patent_app_type] => utility [patent_app_number] => 18/635917 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2689 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635917 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635917
SEMICONDUCTOR DEVICE HAVING RESISTANCE UNITS Apr 14, 2024 Pending
Array ( [id] => 19191448 [patent_doc_number] => 20240170361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => PACKAGING SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/499241 [patent_app_country] => US [patent_app_date] => 2023-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8260 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499241 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/499241
PACKAGING SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME Oct 31, 2023 Pending
Array ( [id] => 19252919 [patent_doc_number] => 20240203916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE HAVING BONDING ELEMENT [patent_app_type] => utility [patent_app_number] => 18/379837 [patent_app_country] => US [patent_app_date] => 2023-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6348 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18379837 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/379837
METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE HAVING BONDING ELEMENT Oct 12, 2023 Pending
Array ( [id] => 19223605 [patent_doc_number] => 20240188309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/452616 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18452616 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/452616
MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME Aug 20, 2023 Pending
Array ( [id] => 19285924 [patent_doc_number] => 20240222401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR DEVICE, IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 18/231445 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231445 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231445
SEMICONDUCTOR DEVICE, IMAGE SENSOR Aug 7, 2023 Pending
Array ( [id] => 19500406 [patent_doc_number] => 20240339424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => MICROBUMP STRUCTURE WITH ENCLOSED JOINT WINDOW [patent_app_type] => utility [patent_app_number] => 18/230793 [patent_app_country] => US [patent_app_date] => 2023-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6439 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18230793 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/230793
MICROBUMP STRUCTURE WITH ENCLOSED JOINT WINDOW Aug 6, 2023 Pending
Array ( [id] => 19285807 [patent_doc_number] => 20240222284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/228278 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18228278 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/228278
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE Jul 30, 2023 Pending
Array ( [id] => 18943512 [patent_doc_number] => 20240038651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => CIRCUIT BOARD ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 18/227895 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227895 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227895
CIRCUIT BOARD ARRANGEMENT Jul 27, 2023 Pending
Array ( [id] => 19305778 [patent_doc_number] => 20240234358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => SEMICONDUCTOR PACKAGE HAVING DUMMY SOLDERS AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/226065 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9403 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18226065 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/226065
SEMICONDUCTOR PACKAGE HAVING DUMMY SOLDERS AND MANUFACTURING METHOD THEREOF Jul 24, 2023 Pending
Array ( [id] => 19712716 [patent_doc_number] => 20250022858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => DEVICE COMPRISING STACKED THROUGH ENCAPSULATION VIA INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 18/352976 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11708 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352976 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352976
DEVICE COMPRISING STACKED THROUGH ENCAPSULATION VIA INTERCONNECTS Jul 13, 2023 Pending
Array ( [id] => 19688045 [patent_doc_number] => 20250006590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => DOUBLE-SIDED INTEGRATED CIRCUIT WITH STABILIZING CAGE [patent_app_type] => utility [patent_app_number] => 18/216887 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12360 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -33 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216887 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216887
DOUBLE-SIDED INTEGRATED CIRCUIT WITH STABILIZING CAGE Jun 29, 2023 Pending
Array ( [id] => 18729388 [patent_doc_number] => 20230343684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/343290 [patent_app_country] => US [patent_app_date] => 2023-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18860 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18343290 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/343290
SEMICONDUCTOR DEVICE Jun 27, 2023 Pending
Array ( [id] => 19688086 [patent_doc_number] => 20250006631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => INTEGRATED INDUCTOR INCLUDING MAGNETIC LAYER [patent_app_type] => utility [patent_app_number] => 18/343595 [patent_app_country] => US [patent_app_date] => 2023-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18343595 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/343595
INTEGRATED INDUCTOR INCLUDING MAGNETIC LAYER Jun 27, 2023 Pending
Array ( [id] => 19688019 [patent_doc_number] => 20250006564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => SEMICONDUCTOR STRUCTURES WITH COVER LAYERS [patent_app_type] => utility [patent_app_number] => 18/342709 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10472 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342709 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/342709
SEMICONDUCTOR STRUCTURES WITH COVER LAYERS Jun 26, 2023 Pending
Array ( [id] => 19662077 [patent_doc_number] => 20240429142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/340897 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16195 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340897 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/340897
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Jun 25, 2023 Pending
Array ( [id] => 19646533 [patent_doc_number] => 20240421053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => PACKAGED DEVICE HAVING AN INTEGRATED PASSIVE DEVICE WITH WAFER LEVEL FORMED CONNECTION TO AT LEAST ONE SEMICONDUCTOR DEVICE AND PROCESSES FOR IMPLEMENTING THE SAME [patent_app_type] => utility [patent_app_number] => 18/334527 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18334527 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/334527
PACKAGED DEVICE HAVING AN INTEGRATED PASSIVE DEVICE WITH WAFER LEVEL FORMED CONNECTION TO AT LEAST ONE SEMICONDUCTOR DEVICE AND PROCESSES FOR IMPLEMENTING THE SAME Jun 13, 2023 Pending
Array ( [id] => 19646676 [patent_doc_number] => 20240421196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => GaN SEMICONDUCTOR POWER TRANSISTOR WITH SLANTED GATE FIELD PLATE AND METHOD OF FABRICATION [patent_app_type] => utility [patent_app_number] => 18/209128 [patent_app_country] => US [patent_app_date] => 2023-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209128 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/209128
GaN SEMICONDUCTOR POWER TRANSISTOR WITH SLANTED GATE FIELD PLATE AND METHOD OF FABRICATION Jun 12, 2023 Pending
Array ( [id] => 19634669 [patent_doc_number] => 20240413118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => SOLDER BARRIER STRUCTURE FOR POWER MODULES [patent_app_type] => utility [patent_app_number] => 18/332858 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332858 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/332858
SOLDER BARRIER STRUCTURE FOR POWER MODULES Jun 11, 2023 Abandoned
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