Search

Gregory Aaron Kessler

Examiner (ID: 10410, Phone: (571)270-7762 , Office: P/2196 )

Most Active Art Unit
2196
Art Unit(s)
2196, 2197, 2195
Total Applications
1068
Issued Applications
899
Pending Applications
79
Abandoned Applications
106

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4559140 [patent_doc_number] => 07890953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-15 [patent_title] => 'Storage area network methods and apparatus with coordinated updating of topology representation' [patent_app_type] => utility [patent_app_number] => 11/258581 [patent_app_country] => US [patent_app_date] => 2005-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 47 [patent_no_of_words] => 46321 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/890/07890953.pdf [firstpage_image] =>[orig_patent_app_number] => 11258581 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/258581
Storage area network methods and apparatus with coordinated updating of topology representation Oct 23, 2005 Issued
Array ( [id] => 5143602 [patent_doc_number] => 20070005818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Method and apparatus for managing load on a plurality of processors in network storage system' [patent_app_type] => utility [patent_app_number] => 11/237842 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4208 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20070005818.pdf [firstpage_image] =>[orig_patent_app_number] => 11237842 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/237842
Method and apparatus for managing load on a plurality of processors in network storage system Sep 28, 2005 Abandoned
Array ( [id] => 9143642 [patent_doc_number] => 08584125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Apparatuses, methods, and computer-readable media for interrupt control' [patent_app_type] => utility [patent_app_number] => 10/580848 [patent_app_country] => US [patent_app_date] => 2005-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10391 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10580848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/580848
Apparatuses, methods, and computer-readable media for interrupt control Sep 25, 2005 Issued
Array ( [id] => 5173777 [patent_doc_number] => 20070074217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Scheduling optimizations for user-level threads' [patent_app_type] => utility [patent_app_number] => 11/235865 [patent_app_country] => US [patent_app_date] => 2005-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10845 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20070074217.pdf [firstpage_image] =>[orig_patent_app_number] => 11235865 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/235865
Scheduling optimizations for user-level threads Sep 25, 2005 Abandoned
Array ( [id] => 5108899 [patent_doc_number] => 20070067777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Logging lock data' [patent_app_type] => utility [patent_app_number] => 11/232750 [patent_app_country] => US [patent_app_date] => 2005-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6077 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20070067777.pdf [firstpage_image] =>[orig_patent_app_number] => 11232750 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/232750
Logging lock data Sep 21, 2005 Issued
Array ( [id] => 5771023 [patent_doc_number] => 20060020944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'Method, system and program products for managing logical processors of a computing environment' [patent_app_type] => utility [patent_app_number] => 11/220296 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 15014 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20060020944.pdf [firstpage_image] =>[orig_patent_app_number] => 11220296 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/220296
Method, system and program products for managing logical processors of a computing environment Sep 5, 2005 Issued
Array ( [id] => 5150714 [patent_doc_number] => 20070050774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Time-aware systems' [patent_app_type] => utility [patent_app_number] => 11/210598 [patent_app_country] => US [patent_app_date] => 2005-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4593 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20070050774.pdf [firstpage_image] =>[orig_patent_app_number] => 11210598 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/210598
Time-aware systems Aug 23, 2005 Abandoned
Array ( [id] => 5150703 [patent_doc_number] => 20070050763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'System and method for accelerating input/output access operation on a virtual machine' [patent_app_type] => utility [patent_app_number] => 11/208528 [patent_app_country] => US [patent_app_date] => 2005-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4201 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20070050763.pdf [firstpage_image] =>[orig_patent_app_number] => 11208528 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/208528
System and method for accelerating input/output access operation on a virtual machine Aug 22, 2005 Issued
Array ( [id] => 5001470 [patent_doc_number] => 20070044104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'Adaptive scheduling and management of work processing in a target context in resource contention' [patent_app_type] => utility [patent_app_number] => 11/207071 [patent_app_country] => US [patent_app_date] => 2005-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9689 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20070044104.pdf [firstpage_image] =>[orig_patent_app_number] => 11207071 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/207071
Adaptive scheduling and management of work processing in a target context in resource contention Aug 17, 2005 Issued
Array ( [id] => 8308871 [patent_doc_number] => 08230424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'General interface with arbitrary job managers' [patent_app_type] => utility [patent_app_number] => 11/194957 [patent_app_country] => US [patent_app_date] => 2005-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7408 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11194957 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/194957
General interface with arbitrary job managers Jul 31, 2005 Issued
Array ( [id] => 7692780 [patent_doc_number] => 20070016906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Efficient hardware allocation of processes to processors' [patent_app_type] => utility [patent_app_number] => 11/184424 [patent_app_country] => US [patent_app_date] => 2005-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3123 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20070016906.pdf [firstpage_image] =>[orig_patent_app_number] => 11184424 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/184424
Efficient hardware allocation of processes to processors Jul 17, 2005 Abandoned
Array ( [id] => 5603909 [patent_doc_number] => 20060294256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Method for automating standard operation procedure' [patent_app_type] => utility [patent_app_number] => 11/182805 [patent_app_country] => US [patent_app_date] => 2005-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2867 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20060294256.pdf [firstpage_image] =>[orig_patent_app_number] => 11182805 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/182805
Method for automating standard operation procedure Jul 17, 2005 Abandoned
Array ( [id] => 4590642 [patent_doc_number] => 07831970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Method and apparatus for scheduling periodic tasks based on synthetic homogenization' [patent_app_type] => utility [patent_app_number] => 11/171631 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 9899 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/831/07831970.pdf [firstpage_image] =>[orig_patent_app_number] => 11171631 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/171631
Method and apparatus for scheduling periodic tasks based on synthetic homogenization Jun 29, 2005 Issued
Array ( [id] => 7734944 [patent_doc_number] => 08104038 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-24 [patent_title] => 'Matching descriptions of resources with workload requirements' [patent_app_type] => utility [patent_app_number] => 11/170590 [patent_app_country] => US [patent_app_date] => 2005-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5649 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/104/08104038.pdf [firstpage_image] =>[orig_patent_app_number] => 11170590 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/170590
Matching descriptions of resources with workload requirements Jun 28, 2005 Issued
Array ( [id] => 9507298 [patent_doc_number] => 08745627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'System and method of controlling power in a multi-threaded processor' [patent_app_type] => utility [patent_app_number] => 11/167973 [patent_app_country] => US [patent_app_date] => 2005-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10929 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11167973 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/167973
System and method of controlling power in a multi-threaded processor Jun 26, 2005 Issued
Array ( [id] => 5603908 [patent_doc_number] => 20060294255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Support system for standard operation procedure' [patent_app_type] => utility [patent_app_number] => 11/165134 [patent_app_country] => US [patent_app_date] => 2005-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1812 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20060294255.pdf [firstpage_image] =>[orig_patent_app_number] => 11165134 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/165134
Support system for standard operation procedure Jun 23, 2005 Abandoned
Array ( [id] => 5603941 [patent_doc_number] => 20060294288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'System and method for using protection keys to emulate a large region identifier space' [patent_app_type] => utility [patent_app_number] => 11/166455 [patent_app_country] => US [patent_app_date] => 2005-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4773 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20060294288.pdf [firstpage_image] =>[orig_patent_app_number] => 11166455 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/166455
System and method for using protection keys to emulate a large region identifier space Jun 23, 2005 Abandoned
Array ( [id] => 5144009 [patent_doc_number] => 20070006225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'System and method for converting a target computing device to a virtual machine' [patent_app_type] => utility [patent_app_number] => 11/165753 [patent_app_country] => US [patent_app_date] => 2005-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20070006225.pdf [firstpage_image] =>[orig_patent_app_number] => 11165753 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/165753
System and method for converting a target computing device to a virtual machine Jun 22, 2005 Abandoned
Array ( [id] => 4578479 [patent_doc_number] => 07823151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Method of ensuring the integrity of TLB entries after changing the translation mode of a virtualized operating system without requiring a flush of the TLB' [patent_app_type] => utility [patent_app_number] => 11/153573 [patent_app_country] => US [patent_app_date] => 2005-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3729 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/823/07823151.pdf [firstpage_image] =>[orig_patent_app_number] => 11153573 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/153573
Method of ensuring the integrity of TLB entries after changing the translation mode of a virtualized operating system without requiring a flush of the TLB Jun 14, 2005 Issued
Array ( [id] => 5644381 [patent_doc_number] => 20060282836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'System and method for implementing distributed priority inheritance' [patent_app_type] => utility [patent_app_number] => 11/148329 [patent_app_country] => US [patent_app_date] => 2005-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3926 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0282/20060282836.pdf [firstpage_image] =>[orig_patent_app_number] => 11148329 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/148329
System and method for implementing distributed priority inheritance Jun 8, 2005 Issued
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