
Gregory C. Issing
Examiner (ID: 4055, Phone: (571)272-6973 , Office: P/3646 )
| Most Active Art Unit | 2202 |
| Art Unit(s) | 2202, 3646, 3662, 3642 |
| Total Applications | 2605 |
| Issued Applications | 1869 |
| Pending Applications | 137 |
| Abandoned Applications | 598 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19313436
[patent_doc_number] => 12039251
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-16
[patent_title] => Cell layout of semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/156912
[patent_app_country] => US
[patent_app_date] => 2023-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 7581
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18156912
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/156912 | Cell layout of semiconductor device | Jan 18, 2023 | Issued |
Array
(
[id] => 18362993
[patent_doc_number] => 20230144584
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-11
[patent_title] => METHOD FOR DETERMINING AN ETCH PROFILE OF A LAYER OF A WAFER FOR A SIMULATION SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/091716
[patent_app_country] => US
[patent_app_date] => 2022-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22547
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18091716
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/091716 | METHOD FOR DETERMINING AN ETCH PROFILE OF A LAYER OF A WAFER FOR A SIMULATION SYSTEM | Dec 29, 2022 | Pending |
Array
(
[id] => 19493400
[patent_doc_number] => 12112116
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-08
[patent_title] => Machine learning based model builder and its applications for pattern transferring in semiconductor manufacturing
[patent_app_type] => utility
[patent_app_number] => 18/082226
[patent_app_country] => US
[patent_app_date] => 2022-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7122
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18082226
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/082226 | Machine learning based model builder and its applications for pattern transferring in semiconductor manufacturing | Dec 14, 2022 | Issued |
Array
(
[id] => 18320450
[patent_doc_number] => 20230118578
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-20
[patent_title] => NANOFABRICATION AND DESIGN TECHNIQUES FOR 3D ICS AND CONFIGURABLE ASICS
[patent_app_type] => utility
[patent_app_number] => 18/081165
[patent_app_country] => US
[patent_app_date] => 2022-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21656
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -78
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081165
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/081165 | NANOFABRICATION AND DESIGN TECHNIQUES FOR 3D ICS AND CONFIGURABLE ASICS | Dec 13, 2022 | Pending |
Array
(
[id] => 18326548
[patent_doc_number] => 20230124676
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-20
[patent_title] => NANOFABRICATION AND DESIGN TECHNIQUES FOR 3D ICS AND CONFIGURABLE ASICS
[patent_app_type] => utility
[patent_app_number] => 18/081478
[patent_app_country] => US
[patent_app_date] => 2022-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21629
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -54
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081478
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/081478 | NANOFABRICATION AND DESIGN TECHNIQUES FOR 3D ICS AND CONFIGURABLE ASICS | Dec 13, 2022 | Pending |
Array
(
[id] => 18864573
[patent_doc_number] => 20230419010
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => NANOFABRICATION AND DESIGN TECHNIQUES FOR 3D ICS AND CONFIGURABLE ASICS
[patent_app_type] => utility
[patent_app_number] => 18/081522
[patent_app_country] => US
[patent_app_date] => 2022-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21704
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -56
[patent_words_short_claim] => 18
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081522
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/081522 | NANOFABRICATION AND DESIGN TECHNIQUES FOR 3D ICS AND CONFIGURABLE ASICS | Dec 13, 2022 | Abandoned |
Array
(
[id] => 18268627
[patent_doc_number] => 20230089869
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-23
[patent_title] => SCALABLE RUNTIME VALIDATION FOR ON-DEVICE DESIGN RULE CHECKS
[patent_app_type] => utility
[patent_app_number] => 18/070655
[patent_app_country] => US
[patent_app_date] => 2022-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14181
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070655
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/070655 | SCALABLE RUNTIME VALIDATION FOR ON-DEVICE DESIGN RULE CHECKS | Nov 28, 2022 | Abandoned |
Array
(
[id] => 18513609
[patent_doc_number] => 20230229844
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-20
[patent_title] => INTERACTIVELY PRESENTING FOR MINIMUM OVERLAP SHAPES IN AN IC DESIGN
[patent_app_type] => utility
[patent_app_number] => 17/992906
[patent_app_country] => US
[patent_app_date] => 2022-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12469
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17992906
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/992906 | INTERACTIVELY PRESENTING FOR MINIMUM OVERLAP SHAPES IN AN IC DESIGN | Nov 21, 2022 | Pending |
Array
(
[id] => 18407894
[patent_doc_number] => 20230169247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => AUTO COMPACTION TOOL FOR ELECTRONIC DESIGN AUTOMATION
[patent_app_type] => utility
[patent_app_number] => 17/992881
[patent_app_country] => US
[patent_app_date] => 2022-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23500
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17992881
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/992881 | AUTO COMPACTION TOOL FOR ELECTRONIC DESIGN AUTOMATION | Nov 21, 2022 | Pending |
Array
(
[id] => 18395385
[patent_doc_number] => 20230163606
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-25
[patent_title] => BATTERY MANAGEMENT SYSTEM AND METHOD OF MANAGING BATTERY USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/991185
[patent_app_country] => US
[patent_app_date] => 2022-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3440
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17991185
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/991185 | BATTERY MANAGEMENT SYSTEM AND METHOD OF MANAGING BATTERY USING THE SAME | Nov 20, 2022 | Pending |
Array
(
[id] => 19205043
[patent_doc_number] => 20240176942
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-30
[patent_title] => Dataflow Based Analysis Guidance to Mapper for Buffers Allocation in Multicore Architectures
[patent_app_type] => utility
[patent_app_number] => 18/057199
[patent_app_country] => US
[patent_app_date] => 2022-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8779
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18057199
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/057199 | Dataflow Based Analysis Guidance to Mapper for Buffers Allocation in Multicore Architectures | Nov 17, 2022 | Pending |
Array
(
[id] => 19171561
[patent_doc_number] => 20240157535
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => Rechargeable Battery Device of Cordless Power Tool
[patent_app_type] => utility
[patent_app_number] => 17/986910
[patent_app_country] => US
[patent_app_date] => 2022-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1491
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17986910
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/986910 | Rechargeable Battery Device of Cordless Power Tool | Nov 14, 2022 | Pending |
Array
(
[id] => 18365270
[patent_doc_number] => 20230146861
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-11
[patent_title] => Asynchronous Reset Physically Unclonable Function Circuit
[patent_app_type] => utility
[patent_app_number] => 17/984141
[patent_app_country] => US
[patent_app_date] => 2022-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8348
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984141
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/984141 | Asynchronous Reset Physically Unclonable Function Circuit | Nov 8, 2022 | Pending |
Array
(
[id] => 18268348
[patent_doc_number] => 20230089590
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-23
[patent_title] => MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD
[patent_app_type] => utility
[patent_app_number] => 18/053030
[patent_app_country] => US
[patent_app_date] => 2022-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16998
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18053030
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/053030 | Memory device, integrated circuit device and method | Nov 6, 2022 | Issued |
Array
(
[id] => 20469764
[patent_doc_number] => 12525807
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-13
[patent_title] => Automobile vehicle fast charging device
[patent_app_type] => utility
[patent_app_number] => 18/045779
[patent_app_country] => US
[patent_app_date] => 2022-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 0
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045779
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/045779 | Automobile vehicle fast charging device | Oct 10, 2022 | Issued |
Array
(
[id] => 18140080
[patent_doc_number] => 20230013919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-19
[patent_title] => MACHINE LEARNING BASED INVERSE OPTICAL PROXIMITY CORRECTION AND PROCESS MODEL CALIBRATION
[patent_app_type] => utility
[patent_app_number] => 17/950502
[patent_app_country] => US
[patent_app_date] => 2022-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18485
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950502
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/950502 | Machine learning based inverse optical proximity correction and process model calibration | Sep 21, 2022 | Issued |
Array
(
[id] => 18378417
[patent_doc_number] => 20230153505
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => MACHINE-LEARNING BASED ARCHITECTURAL DESIGN PLACEMENT FOR ELECTRONIC CIRCUITRY OF AN ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/903873
[patent_app_country] => US
[patent_app_date] => 2022-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11857
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903873
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/903873 | MACHINE-LEARNING BASED ARCHITECTURAL DESIGN PLACEMENT FOR ELECTRONIC CIRCUITRY OF AN ELECTRONIC DEVICE | Sep 5, 2022 | Pending |
Array
(
[id] => 18760632
[patent_doc_number] => 11811683
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-11-07
[patent_title] => VLSI layouts of fully connected generalized and pyramid networks with locality exploitation
[patent_app_type] => utility
[patent_app_number] => 17/938928
[patent_app_country] => US
[patent_app_date] => 2022-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 51
[patent_no_of_words] => 37502
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 476
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17938928
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/938928 | VLSI layouts of fully connected generalized and pyramid networks with locality exploitation | Sep 5, 2022 | Issued |
Array
(
[id] => 19608522
[patent_doc_number] => 12157387
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-03
[patent_title] => Dynamic allocation of power modules for charging electric vehicles
[patent_app_type] => utility
[patent_app_number] => 17/903822
[patent_app_country] => US
[patent_app_date] => 2022-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10108
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903822
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/903822 | Dynamic allocation of power modules for charging electric vehicles | Sep 5, 2022 | Issued |
Array
(
[id] => 19006300
[patent_doc_number] => 20240070371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => DEFECT DIAGNOSIS WITH DYNAMIC ROOT CAUSE DETECTION
[patent_app_type] => utility
[patent_app_number] => 17/823273
[patent_app_country] => US
[patent_app_date] => 2022-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5723
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823273
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/823273 | Defect diagnosis with dynamic root cause detection | Aug 29, 2022 | Issued |