Gregory C. Issing

Array ( [id] => 18847395 [patent_doc_number] => 20230409799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SIMULTANEOUS PLACEMENT AND ROUTING BASED METHOD AND APPARATUS FOR INCREMENTAL DESIGN OPTIMIZATION, AND COMPUTER DEVICE [patent_app_type] => utility [patent_app_number] => 17/899164 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7371 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18811180 [patent_doc_number] => 20230385516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHOD AND APPARATUS FOR CHECKING SIGNAL LINE [patent_app_type] => utility [patent_app_number] => 17/898727 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17898727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19053455 [patent_doc_number] => 20240095424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => Alignment Cost for Integrated Circuit Placement [patent_app_type] => utility [patent_app_number] => 17/890370 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20403759 [patent_doc_number] => 12493735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Semiconductor void placement [patent_app_type] => utility [patent_app_number] => 17/889405 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889405 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18453694 [patent_doc_number] => 20230194974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => METHODS FOR OPTICAL PROXIMITY CORRECTION AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/819031 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10698 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17819031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18193099 [patent_doc_number] => 20230046618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => OPERATION CIRCUIT AND CHIP [patent_app_type] => utility [patent_app_number] => 17/886093 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886093 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18415129 [patent_doc_number] => 11669672 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-06-06 [patent_title] => Regression test method, electronic device and storage medium [patent_app_type] => utility [patent_app_number] => 17/884899 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5073 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884899 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19313434 [patent_doc_number] => 12039249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => System and method for diagnosing design rule check violations [patent_app_type] => utility [patent_app_number] => 17/876118 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 11 [patent_no_of_words] => 12087 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19740145 [patent_doc_number] => 12216980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Method and system for fixing violation of layout [patent_app_type] => utility [patent_app_number] => 17/875314 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9230 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875314 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18453695 [patent_doc_number] => 20230194975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => OPTICAL PROXIMITY CORRECTION SYSTEM AND OPERATING METHOD [patent_app_type] => utility [patent_app_number] => 17/873260 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873260 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19950316 [patent_doc_number] => 12321681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Full die and partial die tape outs from common design [patent_app_type] => utility [patent_app_number] => 17/873694 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 10958 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873694 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18925809 [patent_doc_number] => 20240028813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR LAYOUT AND METHOD FOR CHECKING THE SHIFT IN THE SEMICONDUCTOR LAYOUT [patent_app_type] => utility [patent_app_number] => 17/872858 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18849595 [patent_doc_number] => 20230411999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => WIRELESSLY RECHARGEABLE HEARING DEVICE [patent_app_type] => utility [patent_app_number] => 17/871874 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18149251 [patent_doc_number] => 20230023108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => System and Method for Purchasing Wireless Battery Charge for Electronic Devices [patent_app_type] => utility [patent_app_number] => 17/870972 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870972 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20388449 [patent_doc_number] => 12488177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Waveform capture using multicycle path properties [patent_app_type] => utility [patent_app_number] => 17/870381 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6233 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18653548 [patent_doc_number] => 20230299389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => BATTERY TEMPERATURE CONTROL SYSTEM [patent_app_type] => utility [patent_app_number] => 17/869457 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869457 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20331811 [patent_doc_number] => 12462088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Chip design verification system, chip design verification method, and computer readable recording media with stored program [patent_app_type] => utility [patent_app_number] => 17/865593 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 2188 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 435 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18471684 [patent_doc_number] => 20230205970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => METHOD FOR OPTICAL PROXIMITY CORRECTION OF PHOTOMASK LAYOUT UTILIZING PARAMETERS OBTAINED THROUGH ACTUAL PHOTOMASK MANUFACTURE [patent_app_type] => utility [patent_app_number] => 17/860225 [patent_app_country] => US [patent_app_date] => 2022-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4073 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17860225 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18144021 [patent_doc_number] => 20230017872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => OPTIMIZATION OF ALTERNATING BUCHI AUTOMATA FOR FORMAL VERIFICATION OF A CIRCUIT DESIGN [patent_app_type] => utility [patent_app_number] => 17/859649 [patent_app_country] => US [patent_app_date] => 2022-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18499523 [patent_doc_number] => 20230222280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => METHOD AND APPARATUS FOR ANALYZING CIRCUIT, ELECTRONIC DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/810598 [patent_app_country] => US [patent_app_date] => 2022-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810598 [rel_patent_id] =>[rel_patent_doc_number] =>)