Search

Gregory C. Issing

Examiner (ID: 4055, Phone: (571)272-6973 , Office: P/3646 )

Most Active Art Unit
2202
Art Unit(s)
2202, 3646, 3662, 3642
Total Applications
2605
Issued Applications
1869
Pending Applications
137
Abandoned Applications
598

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19461351 [patent_doc_number] => 12101885 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Server motherboard, server, and power supply control method [patent_app_type] => utility [patent_app_number] => 17/474053 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5013 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/474053
Server motherboard, server, and power supply control method Sep 13, 2021 Issued
Array ( [id] => 19313433 [patent_doc_number] => 12039248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Rule check method and apparatus, and storage medium [patent_app_type] => utility [patent_app_number] => 17/471252 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6836 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17471252 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/471252
Rule check method and apparatus, and storage medium Sep 9, 2021 Issued
Array ( [id] => 17475111 [patent_doc_number] => 20220082615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => ADAPTIVE BODY BIASING OR VOLTAGE REGULATION USING SLACK SENSORS [patent_app_type] => utility [patent_app_number] => 17/468982 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468982 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/468982
Adaptive body biasing or voltage regulation using slack sensors Sep 7, 2021 Issued
Array ( [id] => 18226690 [patent_doc_number] => 20230065684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => COMBINED CLASSICAL/QUANTUM PREDICTOR EVALUATION WITH MODEL ACCURACY ADJUSTMENT [patent_app_type] => utility [patent_app_number] => 17/410553 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12430 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410553 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410553
Combined classical/quantum predictor evaluation with model accuracy adjustment Aug 23, 2021 Issued
Array ( [id] => 17261338 [patent_doc_number] => 20210374323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => INTEGRATED CIRCUIT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/404594 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17022 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404594 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404594
Integrated circuit structure Aug 16, 2021 Issued
Array ( [id] => 18657035 [patent_doc_number] => 20230302938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => Device and Method for Determining the Overall Amount of Energy for a Charging Process [patent_app_type] => utility [patent_app_number] => 18/023213 [patent_app_country] => US [patent_app_date] => 2021-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18023213 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/023213
Device and Method for Determining the Overall Amount of Energy for a Charging Process Aug 12, 2021 Pending
Array ( [id] => 19015176 [patent_doc_number] => 11922109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Predictive antenna diode insertion [patent_app_type] => utility [patent_app_number] => 17/400176 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400176 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/400176
Predictive antenna diode insertion Aug 11, 2021 Issued
Array ( [id] => 19524441 [patent_doc_number] => 12126185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Digital ping selection in a multi-coil wireless charging device [patent_app_type] => utility [patent_app_number] => 17/400053 [patent_app_country] => US [patent_app_date] => 2021-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 15794 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/400053
Digital ping selection in a multi-coil wireless charging device Aug 10, 2021 Issued
Array ( [id] => 19313432 [patent_doc_number] => 12039247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Test pattern generation systems and methods [patent_app_type] => utility [patent_app_number] => 17/397684 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397684 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/397684
Test pattern generation systems and methods Aug 8, 2021 Issued
Array ( [id] => 19212711 [patent_doc_number] => 12001774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Method to cure antenna violations in clock network using jumpers [patent_app_type] => utility [patent_app_number] => 17/392341 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5139 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17392341 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/392341
Method to cure antenna violations in clock network using jumpers Aug 2, 2021 Issued
Array ( [id] => 17388134 [patent_doc_number] => 20220035986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => SUPERSEDING DESIGN RULE CHECK (DRC) RULES IN A DRC-CORRECT INTERACTIVE ROUTER [patent_app_type] => utility [patent_app_number] => 17/393079 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393079 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393079
Superseding design rule check (DRC) rules in a DRC-correct interactive router Aug 2, 2021 Issued
Array ( [id] => 18873476 [patent_doc_number] => 11861287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Integrated circuit development using density-aware border fill [patent_app_type] => utility [patent_app_number] => 17/391117 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6332 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391117 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391117
Integrated circuit development using density-aware border fill Aug 1, 2021 Issued
Array ( [id] => 17492534 [patent_doc_number] => 11281839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Method, apparatus and electronic device for photolithographic mask optimization of joint optimization of pattern and image [patent_app_type] => utility [patent_app_number] => 17/389496 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 7133 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 449 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389496 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/389496
Method, apparatus and electronic device for photolithographic mask optimization of joint optimization of pattern and image Jul 29, 2021 Issued
Array ( [id] => 18181330 [patent_doc_number] => 20230042059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => FAST INDEPENDENT CHECKER FOR EXTREME ULTRAVIOLET (EUV) ROUTING [patent_app_type] => utility [patent_app_number] => 17/389860 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389860 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/389860
Fast independent checker for extreme ultraviolet (EUV) routing Jul 29, 2021 Issued
Array ( [id] => 18720390 [patent_doc_number] => 11797736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => SARO: scalable attack-resistant obfuscation of logic circuits [patent_app_type] => utility [patent_app_number] => 17/443815 [patent_app_country] => US [patent_app_date] => 2021-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 5514 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17443815 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/443815
SARO: scalable attack-resistant obfuscation of logic circuits Jul 26, 2021 Issued
Array ( [id] => 18527956 [patent_doc_number] => 11714950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Automated timing closure on circuit designs [patent_app_type] => utility [patent_app_number] => 17/382621 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 13518 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382621 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382621
Automated timing closure on circuit designs Jul 21, 2021 Issued
Array ( [id] => 18561159 [patent_doc_number] => 11726402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Method and system for layout enhancement based on inter-cell correlation [patent_app_type] => utility [patent_app_number] => 17/383287 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 8600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17383287 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/383287
Method and system for layout enhancement based on inter-cell correlation Jul 21, 2021 Issued
Array ( [id] => 17984912 [patent_doc_number] => 20220350949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => TECHNOLOGY FILE PROCESS RULE VALIDATION [patent_app_type] => utility [patent_app_number] => 17/381499 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381499 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/381499
Technology file process rule validation Jul 20, 2021 Issued
Array ( [id] => 18592387 [patent_doc_number] => 11741287 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-08-29 [patent_title] => Prioritized mask correction [patent_app_type] => utility [patent_app_number] => 17/370990 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 12928 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370990 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370990
Prioritized mask correction Jul 7, 2021 Issued
Array ( [id] => 18122959 [patent_doc_number] => 20230008569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => SYSTEM MEMORY-AWARE CIRCUIT REGION PARTITIONING [patent_app_type] => utility [patent_app_number] => 17/369329 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17369329 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/369329
System memory-aware circuit region partitioning Jul 6, 2021 Issued
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