Search

Gregory H. Curran

Examiner (ID: 19056, Phone: (571)270-7505 , Office: P/2852 )

Most Active Art Unit
2852
Art Unit(s)
2852, 4175
Total Applications
1268
Issued Applications
1127
Pending Applications
72
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18812223 [patent_doc_number] => 20230386560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHOD FOR SENSE MARGIN DETECTION FOR SENSE AMPLIFIER AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/868774 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868774 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868774
Method for sense margin detection for sense amplifier and electronic device Jul 19, 2022 Issued
Array ( [id] => 18926786 [patent_doc_number] => 20240029790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => DEVICE WITH RECONFIGURABLE SHORT TERM DATA RETENTION [patent_app_type] => utility [patent_app_number] => 17/813650 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5662 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813650 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/813650
Device with reconfigurable short term data retention Jul 19, 2022 Issued
Array ( [id] => 18905769 [patent_doc_number] => 20240021254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => MEMORY DEVICE AND DATA SEARCH METHOD FOR IN-MEMORY SEARCH [patent_app_type] => utility [patent_app_number] => 17/812243 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17812243 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/812243
Memory device and data search method for in-memory search Jul 12, 2022 Issued
Array ( [id] => 18920374 [patent_doc_number] => 11882684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Memory device comprising an electrically floating body transistor [patent_app_type] => utility [patent_app_number] => 17/863848 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 63 [patent_no_of_words] => 19847 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17863848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/863848
Memory device comprising an electrically floating body transistor Jul 12, 2022 Issued
Array ( [id] => 18614194 [patent_doc_number] => 20230280931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => DATA WRITING CIRCUIT, DATA WRITING METHOD, AND MEMORY [patent_app_type] => utility [patent_app_number] => 17/855848 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855848
Data writing circuit, data writing method, and memory Jun 30, 2022 Issued
Array ( [id] => 19328591 [patent_doc_number] => 12046280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/809642 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 43 [patent_no_of_words] => 11327 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/809642
Semiconductor structure and manufacturing method thereof Jun 28, 2022 Issued
Array ( [id] => 18820836 [patent_doc_number] => 20230395177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUILT-IN SELF-TEST [patent_app_type] => utility [patent_app_number] => 17/807314 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807314 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807314
Enabling or disabling on-die error-correcting code for a memory built-in self-test Jun 15, 2022 Issued
Array ( [id] => 17917200 [patent_doc_number] => 20220319596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => COMPUTE-IN-MEMORY ARRAY AND MODULE, AND DATA COMPUTING METHOD [patent_app_type] => utility [patent_app_number] => 17/841689 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841689 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/841689
Compute-in-memory array and module, and data computing method Jun 15, 2022 Issued
Array ( [id] => 19370301 [patent_doc_number] => 12062391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Apparatus and method for controlling refresh operation [patent_app_type] => utility [patent_app_number] => 17/842370 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842370 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842370
Apparatus and method for controlling refresh operation Jun 15, 2022 Issued
Array ( [id] => 18848491 [patent_doc_number] => 20230410895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MEMORY ARRAY ARCHITECTURE HAVING SENSING CIRCUITRY TO DRIVE TWO MATRICES FOR HIGHER ARRAY EFFICIENCY [patent_app_type] => utility [patent_app_number] => 17/842492 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842492 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842492
Memory array architecture having sensing circuitry to drive two matrices for higher array efficiency Jun 15, 2022 Issued
Array ( [id] => 18500286 [patent_doc_number] => 20230223071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => CONTROL AMPLIFYING CIRCUIT, SENSE AMPLIFIER AND SEMICONDUCTOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/807135 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807135
Control amplifying circuit, sense amplifier and semiconductor memory Jun 14, 2022 Issued
Array ( [id] => 19123373 [patent_doc_number] => 11967367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Nonvolatile memory device and storage device including nonvolatile memory device [patent_app_type] => utility [patent_app_number] => 17/806103 [patent_app_country] => US [patent_app_date] => 2022-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 14890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806103 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806103
Nonvolatile memory device and storage device including nonvolatile memory device Jun 8, 2022 Issued
Array ( [id] => 18833574 [patent_doc_number] => 20230402101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => TECHNIQUES FOR DETERMINING LAST PROGRAMMED WORDLINE [patent_app_type] => utility [patent_app_number] => 17/835396 [patent_app_country] => US [patent_app_date] => 2022-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13860 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17835396 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/835396
TECHNIQUES FOR DETERMINING LAST PROGRAMMED WORDLINE Jun 7, 2022 Abandoned
Array ( [id] => 18040839 [patent_doc_number] => 20220385056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => SYSTEMS AND METHODS FOR DETECTING AND IDENTIFYING ARCING BASED ON NUMERICAL ANALYSIS [patent_app_type] => utility [patent_app_number] => 17/831977 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831977 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/831977
Systems and methods for detecting and identifying arcing based on numerical analysis Jun 2, 2022 Issued
Array ( [id] => 19108467 [patent_doc_number] => 11961580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Sense amplifier and method thereof [patent_app_type] => utility [patent_app_number] => 17/805026 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 10361 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17805026 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/805026
Sense amplifier and method thereof May 31, 2022 Issued
Array ( [id] => 17870441 [patent_doc_number] => 20220293178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS [patent_app_type] => utility [patent_app_number] => 17/829571 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829571 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/829571
Resistance change memory cell circuits and methods May 31, 2022 Issued
Array ( [id] => 18812232 [patent_doc_number] => 20230386569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => LOW POWER MULTI-LEVEL CELL (MLC) PROGRAMMING IN NON-VOLATILE MEMORY STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/825193 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825193 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825193
Low power multi-level cell (MLC) programming in non-volatile memory structures May 25, 2022 Issued
Array ( [id] => 17993503 [patent_doc_number] => 20220359540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => THIN FILM TRANSISTOR RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/824434 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824434 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824434
Thin film transistor random access memory May 24, 2022 Issued
Array ( [id] => 18623543 [patent_doc_number] => 11756596 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-09-12 [patent_title] => Transition structures for three-dimensional memory arrays [patent_app_type] => utility [patent_app_number] => 17/752332 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 14582 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752332 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/752332
Transition structures for three-dimensional memory arrays May 23, 2022 Issued
Array ( [id] => 17840487 [patent_doc_number] => 20220277793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => NONVOLATILE MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/745837 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17745837 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/745837
Nonvolatile memory device and operation method thereof May 15, 2022 Issued
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