Guerrier Merant

Array ( [id] => 20379852 [patent_doc_number] => 20250362345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => METHOD AND SYSTEM FOR PERFORMING TRANSFER FUNCTION MEASUREMENTS ON A DEVICE [patent_app_type] => utility [patent_app_number] => 19/298065 [patent_app_country] => US [patent_app_date] => 2025-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19298065 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20681119 [patent_doc_number] => 20260119943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => DUAL-HELIX QUANTUM ENCODING ARCHITECTURE AND MULTIDIMENSIONAL QUANTUM COMPUTING SYSTEM [patent_app_type] => utility [patent_app_number] => 19/083366 [patent_app_country] => US [patent_app_date] => 2025-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19083366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20221654 [patent_doc_number] => 20250284585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => MEMORY CONTROLLER, MEMORY MODULE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 19/070100 [patent_app_country] => US [patent_app_date] => 2025-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6742 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19070100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20208131 [patent_doc_number] => 20250277851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => EXPERIMENT-IN-THE-LOOP SYSTEM FOR FAST AND EFFECTIVE TUNING OF ACTIVE VIBRATION CONTROLLERS [patent_app_type] => utility [patent_app_number] => 19/063473 [patent_app_country] => US [patent_app_date] => 2025-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19063473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20679607 [patent_doc_number] => 20260118421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => I3C ERROR STATES TEST STRATEGY [patent_app_type] => utility [patent_app_number] => 19/040167 [patent_app_country] => US [patent_app_date] => 2025-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19040167 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20660386 [patent_doc_number] => 20260112437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-23 [patent_title] => SYSTEMS AND METHODS FOR DEBUGGING AND PROFILING A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 19/035124 [patent_app_country] => US [patent_app_date] => 2025-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19035124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20018050 [patent_doc_number] => 20250156272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => APPARATUS FOR REDUNDANT ARRAY OF INDEPENDENT DISKS [patent_app_type] => utility [patent_app_number] => 19/021490 [patent_app_country] => US [patent_app_date] => 2025-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19021490 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20010124 [patent_doc_number] => 20250148346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => TECHNOLOGIES FOR RESOURCE-EFFICIENT QUANTUM ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 19/014953 [patent_app_country] => US [patent_app_date] => 2025-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19014953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20835708 [patent_doc_number] => 20260195218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-07-09 [patent_title] => Data Storage Device and Method for Enabling Orthogonal Parity [patent_app_type] => utility [patent_app_number] => 19/009125 [patent_app_country] => US [patent_app_date] => 2025-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19009125 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19994552 [patent_doc_number] => 20250132774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => ERROR CORRECTION DECODING DEVICE AND ERROR CORRECTION DECODING METHOD [patent_app_type] => utility [patent_app_number] => 18/999672 [patent_app_country] => US [patent_app_date] => 2024-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18999672 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19893076 [patent_doc_number] => 20250118388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => METADATA STORAGE AT A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/987930 [patent_app_country] => US [patent_app_date] => 2024-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18987930 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20095092 [patent_doc_number] => 20250225028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => ADAPTIVE ERROR HANDLING FOR A WIDE RANGE OF HIGH-RELIABILITY ERROR RATES [patent_app_type] => utility [patent_app_number] => 18/977022 [patent_app_country] => US [patent_app_date] => 2024-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18977022 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20086521 [patent_doc_number] => 20250216457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => TEST DEVICE PERFORMING TEST OPERATION ON LATCH CIRCUIT, OPERATING METHOD OF TEST DEVICE, AND STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/977481 [patent_app_country] => US [patent_app_date] => 2024-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3841 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18977481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20140069 [patent_doc_number] => 20250247113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => MODEM CHIP FOR LOW-POWER DECODING BASED ON TRANSITION OF LOG LIKELIHOOD RATIO AND OPERATING METHOD OF TURBO DECODER [patent_app_type] => utility [patent_app_number] => 18/975826 [patent_app_country] => US [patent_app_date] => 2024-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18975826 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19851577 [patent_doc_number] => 20250096928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => PHYSICAL CODING SUBLAYER WITH MODIFIED BIT ORDERING TO IMPROVE ERROR BURST RESILIENCY [patent_app_type] => utility [patent_app_number] => 18/969740 [patent_app_country] => US [patent_app_date] => 2024-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18969740 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20488949 [patent_doc_number] => 20260025151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => METHOD AND APPARATUS FOR DECODING NON-BINARY LOW-DENSITY PARITY-CHECK CODE IN COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/953762 [patent_app_country] => US [patent_app_date] => 2024-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18953762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20181193 [patent_doc_number] => 20250265151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => NON-VOLATILE MEMORY DEVICE, CONTROLLER, AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/949110 [patent_app_country] => US [patent_app_date] => 2024-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18949110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20709542 [patent_doc_number] => 20260133876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-05-14 [patent_title] => SOLAR POWER BASED MEMORY REFRESH IN A DATA STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/943022 [patent_app_country] => US [patent_app_date] => 2024-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18943022 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19804992 [patent_doc_number] => 20250070917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => OPTIMIZED CODE-SPLIT SYMBOL CONSTELLATIONS [patent_app_type] => utility [patent_app_number] => 18/941613 [patent_app_country] => US [patent_app_date] => 2024-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18941613 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20009623 [patent_doc_number] => 20250147845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => MEMORY DEVICE, PROCESSOR, AND OPERATING METHOD OF THE MEMORY DEVICE TO RESTORE DATA DURING POWER CUT-OFF [patent_app_type] => utility [patent_app_number] => 18/937494 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6090 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18937494 [rel_patent_id] =>[rel_patent_doc_number] =>)