
Guerrier Merant
Examiner (ID: 7332)
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2117, 2111, 2138 |
| Total Applications | 1471 |
| Issued Applications | 1274 |
| Pending Applications | 83 |
| Abandoned Applications | 147 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19872266
[patent_doc_number] => 12265123
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-04-01
[patent_title] => Universal test chiplet
[patent_app_type] => utility
[patent_app_number] => 18/900854
[patent_app_country] => US
[patent_app_date] => 2024-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7076
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 554
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18900854
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/900854 | Universal test chiplet | Sep 28, 2024 | Issued |
Array
(
[id] => 19697380
[patent_doc_number] => 20250015925
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-09
[patent_title] => MULTI-CHANNEL DATA TRANSMISSION METHOD AND RECEIVING METHOD, TRANSMISSION END, AND RECEIVING END
[patent_app_type] => utility
[patent_app_number] => 18/886593
[patent_app_country] => US
[patent_app_date] => 2024-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14138
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18886593
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/886593 | MULTI-CHANNEL DATA TRANSMISSION METHOD AND RECEIVING METHOD, TRANSMISSION END, AND RECEIVING END | Sep 15, 2024 | Pending |
Array
(
[id] => 19689105
[patent_doc_number] => 20250007650
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-02
[patent_title] => APPARATUS AND METHOD FOR RANDOM LINEAR CODE ENCODING AND GUESSING RANDOM ADDITIVE NOISE DECODING (GRAND)
[patent_app_type] => utility
[patent_app_number] => 18/884753
[patent_app_country] => US
[patent_app_date] => 2024-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11520
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18884753
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/884753 | APPARATUS AND METHOD FOR RANDOM LINEAR CODE ENCODING AND GUESSING RANDOM ADDITIVE NOISE DECODING (GRAND) | Sep 12, 2024 | Pending |
Array
(
[id] => 19661813
[patent_doc_number] => 20240428878
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => MEMORY DEVICE AND CONTROL METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 18/822476
[patent_app_country] => US
[patent_app_date] => 2024-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9114
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18822476
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/822476 | MEMORY DEVICE AND CONTROL METHOD THEREFOR | Sep 2, 2024 | Pending |
Array
(
[id] => 19645026
[patent_doc_number] => 20240419546
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-19
[patent_title] => STORAGE SYSTEM SPANNING MULTIPLE FAILURE DOMAINS
[patent_app_type] => utility
[patent_app_number] => 18/816170
[patent_app_country] => US
[patent_app_date] => 2024-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5914
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18816170
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/816170 | STORAGE SYSTEM SPANNING MULTIPLE FAILURE DOMAINS | Aug 26, 2024 | Pending |
Array
(
[id] => 19848928
[patent_doc_number] => 20250094279
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-20
[patent_title] => MEMORY SYSTEM AND DATA REARRANGEMENT METHOD
[patent_app_type] => utility
[patent_app_number] => 18/813116
[patent_app_country] => US
[patent_app_date] => 2024-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5762
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18813116
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/813116 | MEMORY SYSTEM AND DATA REARRANGEMENT METHOD | Aug 22, 2024 | Pending |
Array
(
[id] => 19634353
[patent_doc_number] => 20240412802
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => MEMORY, MEMORY SYSTEM, OPERATION METHOD OF THE MEMORY, AND OPERATION OF THE MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/808104
[patent_app_country] => US
[patent_app_date] => 2024-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9198
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 300
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18808104
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/808104 | MEMORY, MEMORY SYSTEM, OPERATION METHOD OF THE MEMORY, AND OPERATION OF THE MEMORY SYSTEM | Aug 18, 2024 | Pending |
Array
(
[id] => 19634353
[patent_doc_number] => 20240412802
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => MEMORY, MEMORY SYSTEM, OPERATION METHOD OF THE MEMORY, AND OPERATION OF THE MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/808104
[patent_app_country] => US
[patent_app_date] => 2024-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9198
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 300
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18808104
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/808104 | MEMORY, MEMORY SYSTEM, OPERATION METHOD OF THE MEMORY, AND OPERATION OF THE MEMORY SYSTEM | Aug 18, 2024 | Pending |
Array
(
[id] => 20096111
[patent_doc_number] => 20250226047
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-10
[patent_title] => MEMORY DEVICE INCLUDING REPAIR MEMORY CELL AND REPAIR METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/805853
[patent_app_country] => US
[patent_app_date] => 2024-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4326
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18805853
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/805853 | MEMORY DEVICE INCLUDING REPAIR MEMORY CELL AND REPAIR METHOD THEREOF | Aug 14, 2024 | Pending |
Array
(
[id] => 19589425
[patent_doc_number] => 20240386982
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-21
[patent_title] => METHOD OF TESTING A MEMORY CIRCUIT AND MEMORY CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/789557
[patent_app_country] => US
[patent_app_date] => 2024-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13847
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789557
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/789557 | METHOD OF TESTING A MEMORY CIRCUIT AND MEMORY CIRCUIT | Jul 29, 2024 | Pending |
Array
(
[id] => 19589425
[patent_doc_number] => 20240386982
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-21
[patent_title] => METHOD OF TESTING A MEMORY CIRCUIT AND MEMORY CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/789557
[patent_app_country] => US
[patent_app_date] => 2024-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13847
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789557
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/789557 | METHOD OF TESTING A MEMORY CIRCUIT AND MEMORY CIRCUIT | Jul 29, 2024 | Pending |
Array
(
[id] => 19749216
[patent_doc_number] => 20250037781
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-30
[patent_title] => NON-VOLATILE MEMORY AND REWRITE CONTROL METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/783136
[patent_app_country] => US
[patent_app_date] => 2024-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5588
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18783136
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/783136 | NON-VOLATILE MEMORY AND REWRITE CONTROL METHOD THEREOF | Jul 23, 2024 | Pending |
Array
(
[id] => 19558541
[patent_doc_number] => 20240370333
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/776538
[patent_app_country] => US
[patent_app_date] => 2024-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15356
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18776538
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/776538 | ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES | Jul 17, 2024 | Pending |
Array
(
[id] => 19725844
[patent_doc_number] => 20250028595
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-23
[patent_title] => VOLTAGE SCALING BASED ON ERROR RATE
[patent_app_type] => utility
[patent_app_number] => 18/773151
[patent_app_country] => US
[patent_app_date] => 2024-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12447
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18773151
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/773151 | VOLTAGE SCALING BASED ON ERROR RATE | Jul 14, 2024 | Pending |
Array
(
[id] => 19545074
[patent_doc_number] => 20240362110
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => ERROR DETECTION AND CHECKING IN WIRELESS COMMUNICATION SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 18/771080
[patent_app_country] => US
[patent_app_date] => 2024-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7385
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18771080
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/771080 | ERROR DETECTION AND CHECKING IN WIRELESS COMMUNICATION SYSTEMS | Jul 11, 2024 | Pending |
Array
(
[id] => 19545074
[patent_doc_number] => 20240362110
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => ERROR DETECTION AND CHECKING IN WIRELESS COMMUNICATION SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 18/771080
[patent_app_country] => US
[patent_app_date] => 2024-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7385
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18771080
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/771080 | ERROR DETECTION AND CHECKING IN WIRELESS COMMUNICATION SYSTEMS | Jul 11, 2024 | Pending |
Array
(
[id] => 19546148
[patent_doc_number] => 20240363184
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => MULTI-LEVEL CELL DATA ENCODING
[patent_app_type] => utility
[patent_app_number] => 18/767098
[patent_app_country] => US
[patent_app_date] => 2024-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8346
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18767098
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/767098 | MULTI-LEVEL CELL DATA ENCODING | Jul 8, 2024 | Pending |
Array
(
[id] => 19633191
[patent_doc_number] => 20240411640
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => Energy-Efficient Error-Correction-Detection Storage
[patent_app_type] => utility
[patent_app_number] => 18/757268
[patent_app_country] => US
[patent_app_date] => 2024-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3672
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18757268
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/757268 | Energy-efficient error-correction-detection storage | Jun 26, 2024 | Issued |
Array
(
[id] => 20344245
[patent_doc_number] => 12467972
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-11
[patent_title] => Scan test in a single-wire bus circuit
[patent_app_type] => utility
[patent_app_number] => 18/755800
[patent_app_country] => US
[patent_app_date] => 2024-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 2120
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18755800
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/755800 | Scan test in a single-wire bus circuit | Jun 26, 2024 | Issued |
Array
(
[id] => 19633191
[patent_doc_number] => 20240411640
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => Energy-Efficient Error-Correction-Detection Storage
[patent_app_type] => utility
[patent_app_number] => 18/757268
[patent_app_country] => US
[patent_app_date] => 2024-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3672
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18757268
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/757268 | Energy-efficient error-correction-detection storage | Jun 26, 2024 | Issued |