Search

Gustavo G. Ramallo

Examiner (ID: 486, Phone: (571)272-9227 , Office: P/2819 )

Most Active Art Unit
2819
Art Unit(s)
2826, 2812, 2819
Total Applications
699
Issued Applications
602
Pending Applications
85
Abandoned Applications
28

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18458792 [patent_doc_number] => 20230200074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => NOVEL 3D NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/172415 [patent_app_country] => US [patent_app_date] => 2023-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18172415 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/172415
NOVEL 3D NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME Feb 21, 2023 Pending
Array ( [id] => 18473101 [patent_doc_number] => 20230207389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => MICROELECTRONIC DEVICES INCLUDING CONTACT STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/172076 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18172076 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/172076
Microelectronic devices with improved alignment for contact structures Feb 20, 2023 Issued
Array ( [id] => 19010118 [patent_doc_number] => 20240074189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/112367 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112367 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/112367
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR MEMORY DEVICE Feb 20, 2023 Pending
Array ( [id] => 19926401 [patent_doc_number] => 12300697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Method of manufacturing a semiconductor memory device with a low voltage transistor [patent_app_type] => utility [patent_app_number] => 18/110935 [patent_app_country] => US [patent_app_date] => 2023-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3197 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 356 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110935 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/110935
Method of manufacturing a semiconductor memory device with a low voltage transistor Feb 16, 2023 Issued
Array ( [id] => 19394799 [patent_doc_number] => 20240284669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => MEMORY DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/169877 [patent_app_country] => US [patent_app_date] => 2023-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18169877 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/169877
Memory device with reduced global selection line structures and method of fabricating the same Feb 15, 2023 Issued
Array ( [id] => 18851162 [patent_doc_number] => 20230413566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/168828 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168828 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/168828
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Feb 13, 2023 Pending
Array ( [id] => 20540201 [patent_doc_number] => 12557288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Memory structure with reduced bridging and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/168582 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 1063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168582 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/168582
Memory structure with reduced bridging and manufacturing method thereof Feb 13, 2023 Issued
Array ( [id] => 18456422 [patent_doc_number] => 20230197704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => METHOD FOR MANUFACTURING ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/169187 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8562 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18169187 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/169187
Electronic device comprising an electrostatic discharge protective unit Feb 13, 2023 Issued
Array ( [id] => 18698508 [patent_doc_number] => 20230328988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => VERTICAL SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/166854 [patent_app_country] => US [patent_app_date] => 2023-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18166854 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/166854
VERTICAL SEMICONDUCTOR DEVICE Feb 8, 2023 Pending
Array ( [id] => 18961139 [patent_doc_number] => 20240049466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/106306 [patent_app_country] => US [patent_app_date] => 2023-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18106306 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/106306
Memory device with multi channel structures and method of manufacturing the same Feb 5, 2023 Issued
Array ( [id] => 20509023 [patent_doc_number] => 12543315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Three-dimensional memory device with low resistance buffer pillar [patent_app_type] => utility [patent_app_number] => 18/163299 [patent_app_country] => US [patent_app_date] => 2023-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 1114 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163299 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/163299
Three-dimensional memory device with low resistance buffer pillar Feb 1, 2023 Issued
Array ( [id] => 19875118 [patent_doc_number] => 12268004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Semiconductor devices with string select channel layer [patent_app_type] => utility [patent_app_number] => 18/103070 [patent_app_country] => US [patent_app_date] => 2023-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 40 [patent_no_of_words] => 13414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18103070 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/103070
Semiconductor devices with string select channel layer Jan 29, 2023 Issued
Array ( [id] => 20831172 [patent_doc_number] => 12684771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-14 [patent_title] => Semiconductor memory device with improved degree of integration [patent_app_type] => utility [patent_app_number] => 18/099418 [patent_app_country] => US [patent_app_date] => 2023-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 3539 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18099418 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/099418
Semiconductor memory device with improved degree of integration Jan 19, 2023 Issued
Array ( [id] => 18907847 [patent_doc_number] => 20240023332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/098552 [patent_app_country] => US [patent_app_date] => 2023-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18098552 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/098552
Semiconductor memory device with decreased parasitic capacitance Jan 17, 2023 Issued
Array ( [id] => 18379730 [patent_doc_number] => 20230154819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/154919 [patent_app_country] => US [patent_app_date] => 2023-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10410 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18154919 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/154919
Semiconductor package with increased thermal dissipation Jan 15, 2023 Issued
Array ( [id] => 20734525 [patent_doc_number] => 12641790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Three-dimensional semiconductor memory device with diffusion stop layer and electronic system including the same [patent_app_type] => utility [patent_app_number] => 18/154982 [patent_app_country] => US [patent_app_date] => 2023-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11543 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18154982 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/154982
Three-dimensional semiconductor memory device with diffusion stop layer and electronic system including the same Jan 15, 2023 Issued
Array ( [id] => 18361665 [patent_doc_number] => 20230143256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => THREE-DIMENSIONAL FLASH MEMORY WITH REDUCED WIRE LENGTH AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/154210 [patent_app_country] => US [patent_app_date] => 2023-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18154210 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/154210
Three-dimensional flash memory with reduced wire length and manufacturing method therefor Jan 12, 2023 Issued
Array ( [id] => 20776499 [patent_doc_number] => 12660191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Semiconductor storage device with reduced threshold voltage fluctuations [patent_app_type] => utility [patent_app_number] => 18/151379 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151379 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151379
Semiconductor storage device with reduced threshold voltage fluctuations Jan 5, 2023 Issued
Array ( [id] => 18381932 [patent_doc_number] => 20230157023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING DATA STORAGE PATTERN [patent_app_type] => utility [patent_app_number] => 18/094007 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11037 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18094007 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/094007
Semiconductor device including data storage pattern with improved retention characteristics Jan 5, 2023 Issued
Array ( [id] => 18458794 [patent_doc_number] => 20230200076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => THREE-DIMENSIONAL MEMORY, THE MANUFACTURING METHOD FOR THE SAME, AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/090981 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090981 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090981
Three-dimensional memory with stacked select-gate structures Dec 28, 2022 Issued
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