Search

Guy J. Lamarre

Examiner (ID: 18400, Phone: (571)272-3826 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2133, 2784
Total Applications
2026
Issued Applications
1799
Pending Applications
60
Abandoned Applications
172

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18303392 [patent_doc_number] => 11625295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Operating memory device in performance mode [patent_app_type] => utility [patent_app_number] => 17/302676 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5971 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17302676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/302676
Operating memory device in performance mode May 9, 2021 Issued
Array ( [id] => 17977406 [patent_doc_number] => 11494266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Raid storage-device-assisted parity update data storage system [patent_app_type] => utility [patent_app_number] => 17/313343 [patent_app_country] => US [patent_app_date] => 2021-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 15676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17313343 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/313343
Raid storage-device-assisted parity update data storage system May 5, 2021 Issued
Array ( [id] => 17846713 [patent_doc_number] => 11436086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Raid storage-device-assisted deferred parity data update system [patent_app_type] => utility [patent_app_number] => 17/308390 [patent_app_country] => US [patent_app_date] => 2021-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17308390 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/308390
Raid storage-device-assisted deferred parity data update system May 4, 2021 Issued
Array ( [id] => 17924654 [patent_doc_number] => 11467903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/301847 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9993 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17301847 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/301847
Memory system and operating method thereof Apr 14, 2021 Issued
Array ( [id] => 17817272 [patent_doc_number] => 11422884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Spare substitution in memory system [patent_app_type] => utility [patent_app_number] => 17/211280 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 19191 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211280 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211280
Spare substitution in memory system Mar 23, 2021 Issued
Array ( [id] => 18054641 [patent_doc_number] => 11528038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Content aware decoding using shared data statistics [patent_app_type] => utility [patent_app_number] => 17/211605 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211605 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211605
Content aware decoding using shared data statistics Mar 23, 2021 Issued
Array ( [id] => 17708269 [patent_doc_number] => 20220208277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => ARCHITECTURES FOR STORING AND RETRIEVING SYSTEM DATA IN A NON-VOLATILE MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/199383 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4661 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199383 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199383
Architectures for storing and retrieving system data in a non-volatile memory system Mar 10, 2021 Issued
Array ( [id] => 18316645 [patent_doc_number] => 11630726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/197599 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11005 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197599 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197599
Memory system and operating method thereof Mar 9, 2021 Issued
Array ( [id] => 19285379 [patent_doc_number] => 20240221856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => MEMORY DEVICE HAVING AN IMPROVED ECC ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/802009 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23452 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17802009 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/802009
Memory device having an improved ECC architecture Mar 1, 2021 Issued
Array ( [id] => 18966441 [patent_doc_number] => 11900212 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-13 [patent_title] => Constructing quantum processes for quantum processors [patent_app_type] => utility [patent_app_number] => 17/185675 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7976 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185675 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185675
Constructing quantum processes for quantum processors Feb 24, 2021 Issued
Array ( [id] => 18048597 [patent_doc_number] => 11522559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Variable read error code correction [patent_app_type] => utility [patent_app_number] => 17/181712 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10466 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17181712 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/181712
Variable read error code correction Feb 21, 2021 Issued
Array ( [id] => 18106093 [patent_doc_number] => 11545999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Transformation of data to non-binary data for storage in non-volatile memories [patent_app_type] => utility [patent_app_number] => 17/182157 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17182157 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/182157
Transformation of data to non-binary data for storage in non-volatile memories Feb 21, 2021 Issued
Array ( [id] => 18577581 [patent_doc_number] => 11734113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Solid state disk access method and apparatus, device, and medium [patent_app_type] => utility [patent_app_number] => 18/009820 [patent_app_country] => US [patent_app_date] => 2021-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 7195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18009820 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/009820
Solid state disk access method and apparatus, device, and medium Feb 19, 2021 Issued
Array ( [id] => 17978424 [patent_doc_number] => 11495296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Read threshold calibration for nonvolatile memory with encoded foggy-fine programming [patent_app_type] => utility [patent_app_number] => 17/171612 [patent_app_country] => US [patent_app_date] => 2021-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 39 [patent_no_of_words] => 24388 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17171612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/171612
Read threshold calibration for nonvolatile memory with encoded foggy-fine programming Feb 8, 2021 Issued
Array ( [id] => 16849016 [patent_doc_number] => 20210149761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => System and Method to Reduce Address Range Scrub Execution Time in Non-volatile Dual Inline Memory Modules [patent_app_type] => utility [patent_app_number] => 17/162807 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162807 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/162807
System and method to reduce address range scrub execution time in non-volatile dual inline memory modules Jan 28, 2021 Issued
Array ( [id] => 16828645 [patent_doc_number] => 20210143938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => APPARATUS FOR TRANSMITTING BROADCAST SIGNAL, APPARATUS FOR RECEIVING BROADCAST SIGNAL, METHOD FOR TRANSMITTING BROADCAST SIGNAL AND METHOD FOR RECEIVING BROADCAST SIGNAL [patent_app_type] => utility [patent_app_number] => 17/156165 [patent_app_country] => US [patent_app_date] => 2021-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 111574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17156165 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/156165
Apparatus for transmitting broadcast signal, apparatus for receiving broadcast signal, method for transmitting broadcast signal and method for receiving broadcast signal Jan 21, 2021 Issued
Array ( [id] => 17024162 [patent_doc_number] => 20210248033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => INTERNAL ERROR CORRECTION FOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/152036 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17152036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/152036
Internal error correction for memory devices Jan 18, 2021 Issued
Array ( [id] => 17817275 [patent_doc_number] => 11422887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Techniques for non-deterministic operation of a stacked memory system [patent_app_type] => utility [patent_app_number] => 17/127572 [patent_app_country] => US [patent_app_date] => 2020-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9646 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17127572 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/127572
Techniques for non-deterministic operation of a stacked memory system Dec 17, 2020 Issued
Array ( [id] => 16729800 [patent_doc_number] => 20210096947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => VARIABLE RESISTANCE RANDOM-ACCESS MEMORY AND METHOD FOR WRITE OPERATION HAVING ERROR BIT RECOVERING FUNCTION THEREOF [patent_app_type] => utility [patent_app_number] => 17/118622 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4615 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118622 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/118622
Variable resistance random-access memory and method for write operation having error bit recovering function thereof Dec 10, 2020 Issued
Array ( [id] => 17301673 [patent_doc_number] => 20210397512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => MEMORY SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 17/118913 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9758 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118913 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/118913
Memory system and method Dec 10, 2020 Issued
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