Search

Guy J. Lamarre

Examiner (ID: 18400, Phone: (571)272-3826 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2133, 2784
Total Applications
2026
Issued Applications
1799
Pending Applications
60
Abandoned Applications
172

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17209508 [patent_doc_number] => 11169881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => System and method for facilitating reduction of complexity and data movement in erasure coding merging on journal and data storage drive [patent_app_type] => utility [patent_app_number] => 16/834861 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16834861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/834861
System and method for facilitating reduction of complexity and data movement in erasure coding merging on journal and data storage drive Mar 29, 2020 Issued
Array ( [id] => 16179054 [patent_doc_number] => 20200226022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/833809 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16833809 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/833809
Memory system Mar 29, 2020 Issued
Array ( [id] => 17196761 [patent_doc_number] => 11165537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Method for encoding information bit sequence in communication network [patent_app_type] => utility [patent_app_number] => 16/831852 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 13114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831852 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831852
Method for encoding information bit sequence in communication network Mar 26, 2020 Issued
Array ( [id] => 16630414 [patent_doc_number] => 20210049067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/825841 [patent_app_country] => US [patent_app_date] => 2020-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16825841 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/825841
MEMORY DEVICE AND METHOD OF OPERATING THE SAME Mar 19, 2020 Abandoned
Array ( [id] => 17325328 [patent_doc_number] => 11216340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Adaptive change of redundancy level of raid [patent_app_type] => utility [patent_app_number] => 16/824016 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8001 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16824016 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/824016
Adaptive change of redundancy level of raid Mar 18, 2020 Issued
Array ( [id] => 17209504 [patent_doc_number] => 11169877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Non-volatile memory data and address encoding for safety coverage [patent_app_type] => utility [patent_app_number] => 16/821155 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8972 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821155 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/821155
Non-volatile memory data and address encoding for safety coverage Mar 16, 2020 Issued
Array ( [id] => 17114095 [patent_doc_number] => 20210294692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SYSTEM AND METHOD FOR FACILITATING ELASTIC ERROR CORRECTION CODE IN MEMORY [patent_app_type] => utility [patent_app_number] => 16/821548 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7302 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821548 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/821548
System and method for facilitating elastic error correction code in memory Mar 16, 2020 Issued
Array ( [id] => 16471421 [patent_doc_number] => 20200372959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => SEMICONDUCTOR APPARATUS AND CONTINUOUS READ METHOD [patent_app_type] => utility [patent_app_number] => 16/816288 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16816288 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/816288
Semiconductor apparatus and continuous read method Mar 11, 2020 Issued
Array ( [id] => 17114597 [patent_doc_number] => 20210295194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => OPTIMIZED BLOCK ENCODING OF LOW-RANK FERMION HAMILTONIANS [patent_app_type] => utility [patent_app_number] => 16/810616 [patent_app_country] => US [patent_app_date] => 2020-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810616 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/810616
Optimized block encoding of low-rank fermion Hamiltonians Mar 4, 2020 Issued
Array ( [id] => 17636860 [patent_doc_number] => 11347584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 16/807220 [patent_app_country] => US [patent_app_date] => 2020-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 45 [patent_no_of_words] => 34992 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16807220 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/807220
Memory system Mar 2, 2020 Issued
Array ( [id] => 16273065 [patent_doc_number] => 20200274553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => COMMUNCIATION METHOD USING POLAR CODE, AND WIRELESS DEVICE [patent_app_type] => utility [patent_app_number] => 16/805701 [patent_app_country] => US [patent_app_date] => 2020-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7087 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805701 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805701
Communciation method using polar code, and wireless device Feb 28, 2020 Issued
Array ( [id] => 17166838 [patent_doc_number] => 11152953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Error detection for a wireless channel [patent_app_type] => utility [patent_app_number] => 16/805636 [patent_app_country] => US [patent_app_date] => 2020-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 25880 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805636 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805636
Error detection for a wireless channel Feb 27, 2020 Issued
Array ( [id] => 17046751 [patent_doc_number] => 11099931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 16/802521 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 16507 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16802521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/802521
Memory system Feb 25, 2020 Issued
Array ( [id] => 17164889 [patent_doc_number] => 11150986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Efficient compaction on log-structured distributed file system using erasure coding for resource consumption reduction [patent_app_type] => utility [patent_app_number] => 16/802151 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16802151 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/802151
Efficient compaction on log-structured distributed file system using erasure coding for resource consumption reduction Feb 25, 2020 Issued
Array ( [id] => 16722244 [patent_doc_number] => 20210089391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => MEMORY SYSTEM AND METHOD PERFORMED THEREBY [patent_app_type] => utility [patent_app_number] => 16/799326 [patent_app_country] => US [patent_app_date] => 2020-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16799326 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/799326
Memory system and method performed thereby Feb 23, 2020 Issued
Array ( [id] => 16077181 [patent_doc_number] => 20200192577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => STORAGE CLUSTER OPERATION USING ERASURE CODED DATA [patent_app_type] => utility [patent_app_number] => 16/797443 [patent_app_country] => US [patent_app_date] => 2020-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16797443 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/797443
Addressable non-volatile random access memory Feb 20, 2020 Issued
Array ( [id] => 16957905 [patent_doc_number] => 11061768 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-13 [patent_title] => Storage device with increased endurance [patent_app_type] => utility [patent_app_number] => 16/791560 [patent_app_country] => US [patent_app_date] => 2020-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 8643 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16791560 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/791560
Storage device with increased endurance Feb 13, 2020 Issued
Array ( [id] => 17031362 [patent_doc_number] => 11093173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 16/790807 [patent_app_country] => US [patent_app_date] => 2020-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 14332 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16790807 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/790807
Memory system Feb 13, 2020 Issued
Array ( [id] => 15966955 [patent_doc_number] => 20200167229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => PARTIALLY WRITTEN SUPERBLOCK TREATMENT [patent_app_type] => utility [patent_app_number] => 16/776600 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16776600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/776600
Partially written superblock treatment Jan 29, 2020 Issued
Array ( [id] => 15969077 [patent_doc_number] => 20200168290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => SELF-EVALUATING ARRAY OF MEMORY [patent_app_type] => utility [patent_app_number] => 16/774505 [patent_app_country] => US [patent_app_date] => 2020-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16774505 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/774505
Self-evaluating array of memory Jan 27, 2020 Issued
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