
Guy J. Lamarre
Examiner (ID: 18400, Phone: (571)272-3826 , Office: P/2112 )
| Most Active Art Unit | 2112 |
| Art Unit(s) | 2112, 2133, 2784 |
| Total Applications | 2026 |
| Issued Applications | 1799 |
| Pending Applications | 60 |
| Abandoned Applications | 172 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14511635
[patent_doc_number] => 20190199472
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-27
[patent_title] => TRANSMITTER AND SIGNAL PROCESSING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/293162
[patent_app_country] => US
[patent_app_date] => 2019-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15036
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293162
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/293162 | Transmitter and signal processing method thereof | Mar 4, 2019 | Issued |
Array
(
[id] => 14511635
[patent_doc_number] => 20190199472
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-27
[patent_title] => TRANSMITTER AND SIGNAL PROCESSING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/293162
[patent_app_country] => US
[patent_app_date] => 2019-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15036
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293162
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/293162 | Transmitter and signal processing method thereof | Mar 4, 2019 | Issued |
Array
(
[id] => 16202785
[patent_doc_number] => 10727976
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-07-28
[patent_title] => Bit order of NR PBCH payload to enhance polar code performance
[patent_app_type] => utility
[patent_app_number] => 16/293396
[patent_app_country] => US
[patent_app_date] => 2019-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 8488
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293396
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/293396 | Bit order of NR PBCH payload to enhance polar code performance | Mar 4, 2019 | Issued |
Array
(
[id] => 14511635
[patent_doc_number] => 20190199472
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-27
[patent_title] => TRANSMITTER AND SIGNAL PROCESSING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/293162
[patent_app_country] => US
[patent_app_date] => 2019-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15036
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293162
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/293162 | Transmitter and signal processing method thereof | Mar 4, 2019 | Issued |
Array
(
[id] => 14940515
[patent_doc_number] => 20190305896
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-03
[patent_title] => METHOD AND SYSTEM FOR SUPPORTING MULTIPLE HYBRID AUTOMATIC REPEAT REQUEST PROCESSES PER TRANSMISSION TIME INTERVAL
[patent_app_type] => utility
[patent_app_number] => 16/291957
[patent_app_country] => US
[patent_app_date] => 2019-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2665
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16291957
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/291957 | Method and system for supporting multiple hybrid automatic repeat request processes per transmission time interval | Mar 3, 2019 | Issued |
Array
(
[id] => 14511641
[patent_doc_number] => 20190199475
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-27
[patent_title] => HIGH PERFORMANCE, FLEXIBLE, AND COMPACT LOW-DENSITY PARITY-CHECK (LDPC) CODE
[patent_app_type] => utility
[patent_app_number] => 16/289113
[patent_app_country] => US
[patent_app_date] => 2019-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 27123
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -30
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16289113
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/289113 | High performance, flexible, and compact low-density parity-check (LDPC) code | Feb 27, 2019 | Issued |
Array
(
[id] => 19063790
[patent_doc_number] => 11943053
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-26
[patent_title] => Code block header for fast RLC PDU deliveries in 5G NR
[patent_app_type] => utility
[patent_app_number] => 17/422785
[patent_app_country] => US
[patent_app_date] => 2019-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 6529
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17422785
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/422785 | Code block header for fast RLC PDU deliveries in 5G NR | Feb 18, 2019 | Issued |
Array
(
[id] => 16077541
[patent_doc_number] => 20200192757
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-18
[patent_title] => FPGA ACCELERATION SYSTEM FOR MSR CODES
[patent_app_type] => utility
[patent_app_number] => 16/271777
[patent_app_country] => US
[patent_app_date] => 2019-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7905
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16271777
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/271777 | FPGA acceleration system for MSR codes | Feb 7, 2019 | Issued |
Array
(
[id] => 16077541
[patent_doc_number] => 20200192757
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-18
[patent_title] => FPGA ACCELERATION SYSTEM FOR MSR CODES
[patent_app_type] => utility
[patent_app_number] => 16/271777
[patent_app_country] => US
[patent_app_date] => 2019-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7905
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16271777
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/271777 | FPGA acceleration system for MSR codes | Feb 7, 2019 | Issued |
Array
(
[id] => 16077541
[patent_doc_number] => 20200192757
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-18
[patent_title] => FPGA ACCELERATION SYSTEM FOR MSR CODES
[patent_app_type] => utility
[patent_app_number] => 16/271777
[patent_app_country] => US
[patent_app_date] => 2019-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7905
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16271777
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/271777 | FPGA acceleration system for MSR codes | Feb 7, 2019 | Issued |
Array
(
[id] => 16077541
[patent_doc_number] => 20200192757
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-18
[patent_title] => FPGA ACCELERATION SYSTEM FOR MSR CODES
[patent_app_type] => utility
[patent_app_number] => 16/271777
[patent_app_country] => US
[patent_app_date] => 2019-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7905
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16271777
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/271777 | FPGA acceleration system for MSR codes | Feb 7, 2019 | Issued |
Array
(
[id] => 15773047
[patent_doc_number] => 20200117541
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-16
[patent_title] => STORING DATA IN A DATA SECTION AND PARITY IN A PARITY SECTION OF COMPUTING DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/267676
[patent_app_country] => US
[patent_app_date] => 2019-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12313
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267676
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/267676 | Storing data in a data section and parity in a parity section of computing devices | Feb 4, 2019 | Issued |
Array
(
[id] => 16224914
[patent_doc_number] => 20200250031
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-06
[patent_title] => METHOD AND SYSTEM FOR MITIGATING READ DISTURB IMPACT ON PERSISTENT MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/268401
[patent_app_country] => US
[patent_app_date] => 2019-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6700
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16268401
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/268401 | Method and system for mitigating read disturb impact on persistent memory | Feb 4, 2019 | Issued |
Array
(
[id] => 16425815
[patent_doc_number] => 20200351013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-05
[patent_title] => APPARATUS AND METHOD FOR COMMUNICATION IN BROADCAST SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/963098
[patent_app_country] => US
[patent_app_date] => 2019-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13307
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16963098
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/963098 | Apparatus and method for communication in broadcast system | Jan 20, 2019 | Issued |
Array
(
[id] => 15956941
[patent_doc_number] => 10666391
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Method for encoding information bit sequence in communication network
[patent_app_type] => utility
[patent_app_number] => 16/249910
[patent_app_country] => US
[patent_app_date] => 2019-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 19
[patent_no_of_words] => 13092
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16249910
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/249910 | Method for encoding information bit sequence in communication network | Jan 16, 2019 | Issued |
Array
(
[id] => 15956941
[patent_doc_number] => 10666391
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Method for encoding information bit sequence in communication network
[patent_app_type] => utility
[patent_app_number] => 16/249910
[patent_app_country] => US
[patent_app_date] => 2019-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 19
[patent_no_of_words] => 13092
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16249910
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/249910 | Method for encoding information bit sequence in communication network | Jan 16, 2019 | Issued |
Array
(
[id] => 15956941
[patent_doc_number] => 10666391
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Method for encoding information bit sequence in communication network
[patent_app_type] => utility
[patent_app_number] => 16/249910
[patent_app_country] => US
[patent_app_date] => 2019-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 19
[patent_no_of_words] => 13092
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16249910
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/249910 | Method for encoding information bit sequence in communication network | Jan 16, 2019 | Issued |
Array
(
[id] => 15956941
[patent_doc_number] => 10666391
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Method for encoding information bit sequence in communication network
[patent_app_type] => utility
[patent_app_number] => 16/249910
[patent_app_country] => US
[patent_app_date] => 2019-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 19
[patent_no_of_words] => 13092
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16249910
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/249910 | Method for encoding information bit sequence in communication network | Jan 16, 2019 | Issued |
Array
(
[id] => 14314327
[patent_doc_number] => 20190146867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-16
[patent_title] => Systems and Methods for Adaptive Data Storage
[patent_app_type] => utility
[patent_app_number] => 16/245233
[patent_app_country] => US
[patent_app_date] => 2019-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26060
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -28
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245233
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/245233 | Systems and methods for adaptive data storage | Jan 9, 2019 | Issued |
Array
(
[id] => 16700614
[patent_doc_number] => 10951234
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-16
[patent_title] => Non-linear LLR look-up tables
[patent_app_type] => utility
[patent_app_number] => 16/245080
[patent_app_country] => US
[patent_app_date] => 2019-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 5552
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16245080
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/245080 | Non-linear LLR look-up tables | Jan 9, 2019 | Issued |