
Guy J. Lamarre
Examiner (ID: 11097, Phone: (571)272-3826 , Office: P/2112 )
| Most Active Art Unit | 2112 |
| Art Unit(s) | 2112, 2133, 2784 |
| Total Applications | 2026 |
| Issued Applications | 1799 |
| Pending Applications | 60 |
| Abandoned Applications | 172 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11586632
[patent_doc_number] => 09641290
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-02
[patent_title] => 'Method and system for supporting multiple hybrid automatic repeat request processes per transmission time interval'
[patent_app_type] => utility
[patent_app_number] => 15/018227
[patent_app_country] => US
[patent_app_date] => 2016-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2783
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15018227
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/018227 | Method and system for supporting multiple hybrid automatic repeat request processes per transmission time interval | Feb 7, 2016 | Issued |
Array
(
[id] => 11586632
[patent_doc_number] => 09641290
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-02
[patent_title] => 'Method and system for supporting multiple hybrid automatic repeat request processes per transmission time interval'
[patent_app_type] => utility
[patent_app_number] => 15/018227
[patent_app_country] => US
[patent_app_date] => 2016-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2783
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15018227
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/018227 | Method and system for supporting multiple hybrid automatic repeat request processes per transmission time interval | Feb 7, 2016 | Issued |
Array
(
[id] => 11418090
[patent_doc_number] => 09564925
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-02-07
[patent_title] => 'Pipelined architecture for iterative decoding of product codes'
[patent_app_type] => utility
[patent_app_number] => 15/013821
[patent_app_country] => US
[patent_app_date] => 2016-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 15323
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15013821
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/013821 | Pipelined architecture for iterative decoding of product codes | Feb 1, 2016 | Issued |
Array
(
[id] => 13863669
[patent_doc_number] => 10193573
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-29
[patent_title] => Method and data processing device for determining an error vector in a data word
[patent_app_type] => utility
[patent_app_number] => 14/965933
[patent_app_country] => US
[patent_app_date] => 2015-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 9653
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14965933
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/965933 | Method and data processing device for determining an error vector in a data word | Dec 10, 2015 | Issued |
Array
(
[id] => 12575664
[patent_doc_number] => 10020825
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-07-10
[patent_title] => Method and apparatus for turbo decoder dynamic iteration control
[patent_app_type] => utility
[patent_app_number] => 14/964791
[patent_app_country] => US
[patent_app_date] => 2015-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 4899
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 306
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14964791
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/964791 | Method and apparatus for turbo decoder dynamic iteration control | Dec 9, 2015 | Issued |
Array
(
[id] => 12459348
[patent_doc_number] => 09985657
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-29
[patent_title] => Memory control module and control method
[patent_app_type] => utility
[patent_app_number] => 14/965723
[patent_app_country] => US
[patent_app_date] => 2015-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4843
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 408
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14965723
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/965723 | Memory control module and control method | Dec 9, 2015 | Issued |
Array
(
[id] => 13055229
[patent_doc_number] => 10049006
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-14
[patent_title] => Controller-based memory scrub for DRAMs with internal error-correcting code (ECC) bits contemporaneously during auto refresh or by using masked write commands
[patent_app_type] => utility
[patent_app_number] => 14/963035
[patent_app_country] => US
[patent_app_date] => 2015-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8482
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963035
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/963035 | Controller-based memory scrub for DRAMs with internal error-correcting code (ECC) bits contemporaneously during auto refresh or by using masked write commands | Dec 7, 2015 | Issued |
Array
(
[id] => 11672422
[patent_doc_number] => 20170161144
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-08
[patent_title] => 'METHOD FOR MEMORY SCRUB OF DRAM WITH INTERNAL ERROR CORRECTING CODE (ECC) BITS DURING EITHER MEMORY ACTIVATE AND/OR PRECHARGE OPERATION'
[patent_app_type] => utility
[patent_app_number] => 14/963067
[patent_app_country] => US
[patent_app_date] => 2015-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8682
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963067
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/963067 | Method for memory scrub of DRAM with internal error correcting code (ECC) bits during either memory activate and/or precharge operation | Dec 7, 2015 | Issued |
Array
(
[id] => 10826966
[patent_doc_number] => 20160173135
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-16
[patent_title] => 'TRANSMITTER AND SIGNAL PROCESSING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/962077
[patent_app_country] => US
[patent_app_date] => 2015-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 16055
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14962077
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/962077 | Transmitter and signal processing method thereof | Dec 7, 2015 | Issued |
Array
(
[id] => 12146647
[patent_doc_number] => 09880900
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-30
[patent_title] => 'Method for scrubbing and correcting DRAM memory data with internal error-correcting code (ECC) bits contemporaneously during self-refresh state'
[patent_app_type] => utility
[patent_app_number] => 14/963023
[patent_app_country] => US
[patent_app_date] => 2015-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8553
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963023
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/963023 | Method for scrubbing and correcting DRAM memory data with internal error-correcting code (ECC) bits contemporaneously during self-refresh state | Dec 7, 2015 | Issued |
Array
(
[id] => 12249133
[patent_doc_number] => 09921908
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-20
[patent_title] => 'Storage device and read reclaim and read method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/960570
[patent_app_country] => US
[patent_app_date] => 2015-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 21
[patent_no_of_words] => 8464
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14960570
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/960570 | Storage device and read reclaim and read method thereof | Dec 6, 2015 | Issued |
Array
(
[id] => 12357381
[patent_doc_number] => 09954645
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-24
[patent_title] => Method and device for providing secure transmission based on polar code
[patent_app_type] => utility
[patent_app_number] => 14/959828
[patent_app_country] => US
[patent_app_date] => 2015-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 34
[patent_no_of_words] => 10601
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14959828
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/959828 | Method and device for providing secure transmission based on polar code | Dec 3, 2015 | Issued |
Array
(
[id] => 13679717
[patent_doc_number] => 20160378595
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-29
[patent_title] => CONTROLLER, SEMICONDUCTOR MEMORY SYSTEM AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 14/958449
[patent_app_country] => US
[patent_app_date] => 2015-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17530
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14958449
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/958449 | Controller, semiconductor memory system and operating method thereof | Dec 2, 2015 | Issued |
Array
(
[id] => 12290898
[patent_doc_number] => 09933973
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-03
[patent_title] => Systems and methods for data organization in storage systems using large erasure codes
[patent_app_type] => utility
[patent_app_number] => 14/954814
[patent_app_country] => US
[patent_app_date] => 2015-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 19
[patent_no_of_words] => 25143
[patent_no_of_claims] => 56
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14954814
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/954814 | Systems and methods for data organization in storage systems using large erasure codes | Nov 29, 2015 | Issued |
Array
(
[id] => 12513441
[patent_doc_number] => 10001944
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-19
[patent_title] => Systems and methods for data organization in storage systems using large erasure codes
[patent_app_type] => utility
[patent_app_number] => 14/954792
[patent_app_country] => US
[patent_app_date] => 2015-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 19
[patent_no_of_words] => 25148
[patent_no_of_claims] => 100
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 375
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14954792
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/954792 | Systems and methods for data organization in storage systems using large erasure codes | Nov 29, 2015 | Issued |
Array
(
[id] => 10818466
[patent_doc_number] => 20160164631
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-09
[patent_title] => 'MEMORY-EFFICIENT METHODS OF TRANSPORTING ERROR CORRECTION CODES IN A SYMBOL ENCODED TRANSMISSION STREAM'
[patent_app_type] => utility
[patent_app_number] => 14/952797
[patent_app_country] => US
[patent_app_date] => 2015-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7501
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14952797
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/952797 | Memory-efficient methods of transporting error correction codes in a symbol encoded transmission stream | Nov 24, 2015 | Issued |
Array
(
[id] => 12255993
[patent_doc_number] => 09928137
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-27
[patent_title] => 'Data storage device and error correction method'
[patent_app_type] => utility
[patent_app_number] => 14/951025
[patent_app_country] => US
[patent_app_date] => 2015-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4928
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14951025
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/951025 | Data storage device and error correction method | Nov 23, 2015 | Issued |
Array
(
[id] => 10801438
[patent_doc_number] => 20160147595
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-26
[patent_title] => 'MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS'
[patent_app_type] => utility
[patent_app_number] => 14/948203
[patent_app_country] => US
[patent_app_date] => 2015-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 11707
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948203
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/948203 | Managing integrity of framed payloads using redundant signals | Nov 19, 2015 | Issued |
Array
(
[id] => 11252049
[patent_doc_number] => 09477552
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-10-25
[patent_title] => 'Priority-based decoding'
[patent_app_type] => utility
[patent_app_number] => 14/946726
[patent_app_country] => US
[patent_app_date] => 2015-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 11728
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14946726
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/946726 | Priority-based decoding | Nov 18, 2015 | Issued |
Array
(
[id] => 11591667
[patent_doc_number] => 20170116078
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-27
[patent_title] => 'SYNDROME-BASED CODEWORD DECODING'
[patent_app_type] => utility
[patent_app_number] => 14/922912
[patent_app_country] => US
[patent_app_date] => 2015-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10182
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14922912
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/922912 | Syndrome-based codeword decoding | Oct 25, 2015 | Issued |