Search

Guy J. Lamarre

Examiner (ID: 18788, Phone: (571)272-3826 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2133, 2784
Total Applications
2026
Issued Applications
1799
Pending Applications
60
Abandoned Applications
172

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10284401 [patent_doc_number] => 20150169398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'DYNAMIC ADJUSTMENT OF DATA PROTECTION SCHEMES IN FLASH STORAGE SYSTEMS BASED ON TEMPERATURE, POWER OFF DURATION AND FLASH AGE' [patent_app_type] => utility [patent_app_number] => 14/107890 [patent_app_country] => US [patent_app_date] => 2013-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14107890 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/107890
Dynamic adjustment of data protection schemes in flash storage systems based on temperature, power off duration and flash age Dec 15, 2013 Issued
Array ( [id] => 10085243 [patent_doc_number] => 09122591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Pipelined data relocation and improved chip architectures' [patent_app_type] => utility [patent_app_number] => 14/106261 [patent_app_country] => US [patent_app_date] => 2013-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 11735 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14106261 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/106261
Pipelined data relocation and improved chip architectures Dec 12, 2013 Issued
Array ( [id] => 12102818 [patent_doc_number] => 09859925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Low-complexity flash memory data-encoding techniques using simplified belief propagation' [patent_app_type] => utility [patent_app_number] => 14/785582 [patent_app_country] => US [patent_app_date] => 2013-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8071 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14785582 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/785582
Low-complexity flash memory data-encoding techniques using simplified belief propagation Dec 12, 2013 Issued
Array ( [id] => 9548728 [patent_doc_number] => 20140173376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'ENCODING METHOD AND APPARATUS USING CRC CODE AND POLAR CODE' [patent_app_type] => utility [patent_app_number] => 14/106021 [patent_app_country] => US [patent_app_date] => 2013-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6061 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14106021 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/106021
Encoding method and apparatus using CRC code and polar code Dec 12, 2013 Issued
Array ( [id] => 10243010 [patent_doc_number] => 20150128006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'DEVICE QUALITY METRICS USING UNSATISFIED PARITY CHECKS' [patent_app_type] => utility [patent_app_number] => 14/101679 [patent_app_country] => US [patent_app_date] => 2013-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5733 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14101679 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/101679
Device quality metrics using unsatisfied parity checks Dec 9, 2013 Issued
Array ( [id] => 10596273 [patent_doc_number] => 09317361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-19 [patent_title] => 'Bit-line defect detection using unsatisfied parity code checks' [patent_app_type] => utility [patent_app_number] => 14/100280 [patent_app_country] => US [patent_app_date] => 2013-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8212 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14100280 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/100280
Bit-line defect detection using unsatisfied parity code checks Dec 8, 2013 Issued
Array ( [id] => 10604874 [patent_doc_number] => 09325449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Lane error detection and lane removal mechanism to reduce the probability of data corruption' [patent_app_type] => utility [patent_app_number] => 14/099345 [patent_app_country] => US [patent_app_date] => 2013-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 37 [patent_no_of_words] => 22070 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14099345 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/099345
Lane error detection and lane removal mechanism to reduce the probability of data corruption Dec 5, 2013 Issued
Array ( [id] => 10269072 [patent_doc_number] => 20150154069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'Adaptive Data Re-Compaction After Post-Write Read Verification Operations' [patent_app_type] => utility [patent_app_number] => 14/095881 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 21322 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14095881 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/095881
Adaptive data re-compaction after post-write read verification operations Dec 2, 2013 Issued
Array ( [id] => 9548741 [patent_doc_number] => 20140173389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'UPDATING SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/092957 [patent_app_country] => US [patent_app_date] => 2013-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1409 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14092957 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/092957
UPDATING SYSTEM AND METHOD Nov 27, 2013 Abandoned
Array ( [id] => 9680587 [patent_doc_number] => 08819514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Method and system for supporting multiple hybrid automatic repeat request processes per transmission time interval' [patent_app_type] => utility [patent_app_number] => 14/082986 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2704 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14082986 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/082986
Method and system for supporting multiple hybrid automatic repeat request processes per transmission time interval Nov 17, 2013 Issued
Array ( [id] => 10125991 [patent_doc_number] => 09160366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Efficient, programmable and scalable low density parity check decoder' [patent_app_type] => utility [patent_app_number] => 14/070000 [patent_app_country] => US [patent_app_date] => 2013-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 6770 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14070000 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/070000
Efficient, programmable and scalable low density parity check decoder Oct 31, 2013 Issued
Array ( [id] => 10854273 [patent_doc_number] => 08880984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Digital broadcasting receiver and method for controlling the same' [patent_app_type] => utility [patent_app_number] => 14/069202 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 39 [patent_no_of_words] => 21746 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14069202 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/069202
Digital broadcasting receiver and method for controlling the same Oct 30, 2013 Issued
Array ( [id] => 9332626 [patent_doc_number] => 20140059408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'ACCUMULATING LDPC (LOW DENSITY PARITY CHECK) DECODER' [patent_app_type] => utility [patent_app_number] => 14/067198 [patent_app_country] => US [patent_app_date] => 2013-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14067198 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/067198
Accumulating LDPC (low density parity check) decoder Oct 29, 2013 Issued
Array ( [id] => 9424241 [patent_doc_number] => 20140108892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'Method and System for Forward Error Correction Decoding With Parity Check for Use in Low Complexity Highly-Spectrally Efficient Communications' [patent_app_type] => utility [patent_app_number] => 14/057098 [patent_app_country] => US [patent_app_date] => 2013-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16341 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14057098 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/057098
Method and system for forward error correction decoding with parity check for use in low complexity highly-spectrally efficient communications Oct 17, 2013 Issued
Array ( [id] => 9420064 [patent_doc_number] => 20140104714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'HIGH-RATE REVESE-ORDER RUN-LENGTH-LIMITED CODE' [patent_app_type] => utility [patent_app_number] => 14/054586 [patent_app_country] => US [patent_app_date] => 2013-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5375 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14054586 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/054586
High-rate reverse-order run-length-limited code Oct 14, 2013 Issued
Array ( [id] => 9520600 [patent_doc_number] => 20140157092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'SYSTEMS AND METHODS FOR ENCODING AND DECODING OF CHECK-IRREGULAR NON-SYSTEMATIC IRA CODES' [patent_app_type] => utility [patent_app_number] => 14/052440 [patent_app_country] => US [patent_app_date] => 2013-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 11758 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14052440 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/052440
Systems and methods for encoding and decoding of check-irregular non-systematic IRA codes Oct 10, 2013 Issued
Array ( [id] => 9297053 [patent_doc_number] => 20140040687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'Non-Volatile Memory (NVM) with Imminent Error Prediction' [patent_app_type] => utility [patent_app_number] => 14/048362 [patent_app_country] => US [patent_app_date] => 2013-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5070 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14048362 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/048362
Non-volatile memory (NVM) with imminent error prediction Oct 7, 2013 Issued
Array ( [id] => 9765937 [patent_doc_number] => 08850285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'System and method for transmitting and receiving acknowledgement information' [patent_app_type] => utility [patent_app_number] => 14/047769 [patent_app_country] => US [patent_app_date] => 2013-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 17616 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14047769 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/047769
System and method for transmitting and receiving acknowledgement information Oct 6, 2013 Issued
Array ( [id] => 10890687 [patent_doc_number] => 08914700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Data processing method, apparatus and system' [patent_app_type] => utility [patent_app_number] => 14/025553 [patent_app_country] => US [patent_app_date] => 2013-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 8447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14025553 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/025553
Data processing method, apparatus and system Sep 11, 2013 Issued
Array ( [id] => 9781389 [patent_doc_number] => 08856612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-07 [patent_title] => 'Method and apparatus for interleaving data in a mobile communication system' [patent_app_type] => utility [patent_app_number] => 13/974734 [patent_app_country] => US [patent_app_date] => 2013-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 9144 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13974734 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/974734
Method and apparatus for interleaving data in a mobile communication system Aug 22, 2013 Issued
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