Search

Guy J. Lamarre

Examiner (ID: 8964)

Most Active Art Unit
2112
Art Unit(s)
2784, 2133, 2112
Total Applications
2026
Issued Applications
1799
Pending Applications
60
Abandoned Applications
172

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17753581 [patent_doc_number] => 20220231786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => HARQ FOR ADVANCED CHANNEL CODES [patent_app_type] => utility [patent_app_number] => 17/713793 [patent_app_country] => US [patent_app_date] => 2022-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17713793 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/713793
HARQ for advanced channel codes Apr 4, 2022 Issued
Array ( [id] => 17722114 [patent_doc_number] => 20220214836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => ENHANCED SSD RELIABILITY [patent_app_type] => utility [patent_app_number] => 17/701664 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701664 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701664
Enhanced SSD reliability Mar 21, 2022 Issued
Array ( [id] => 18454284 [patent_doc_number] => 20230195564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => Circuit and Method for Reading ECC from Memory [patent_app_type] => utility [patent_app_number] => 17/698729 [patent_app_country] => US [patent_app_date] => 2022-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17698729 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/698729
Circuit and method for reading ECC from memory Mar 17, 2022 Issued
Array ( [id] => 18981892 [patent_doc_number] => 11907064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Memory controller and memory system including the same [patent_app_type] => utility [patent_app_number] => 17/697530 [patent_app_country] => US [patent_app_date] => 2022-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 5840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17697530 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/697530
Memory controller and memory system including the same Mar 16, 2022 Issued
Array ( [id] => 18795467 [patent_doc_number] => 11829245 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Multi-layer code rate architecture for copyback between partitions with different code rates [patent_app_type] => utility [patent_app_number] => 17/696245 [patent_app_country] => US [patent_app_date] => 2022-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13066 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17696245 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/696245
Multi-layer code rate architecture for copyback between partitions with different code rates Mar 15, 2022 Issued
Array ( [id] => 18875712 [patent_doc_number] => 11863544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Authenticating a node in a communication network of an automation installation [patent_app_type] => utility [patent_app_number] => 17/695247 [patent_app_country] => US [patent_app_date] => 2022-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6547 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17695247 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/695247
Authenticating a node in a communication network of an automation installation Mar 14, 2022 Issued
Array ( [id] => 18891681 [patent_doc_number] => 11870463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Data reliability for extreme temperature usage conditions in data storage [patent_app_type] => utility [patent_app_number] => 17/694280 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11186 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694280 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/694280
Data reliability for extreme temperature usage conditions in data storage Mar 13, 2022 Issued
Array ( [id] => 19122827 [patent_doc_number] => 11966817 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-04-23 [patent_title] => Teleporting magic states from a color code to a surface code and decoding a merged surface-color code [patent_app_type] => utility [patent_app_number] => 17/694399 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 26063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694399 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/694399
Teleporting magic states from a color code to a surface code and decoding a merged surface-color code Mar 13, 2022 Issued
Array ( [id] => 18138691 [patent_doc_number] => 20230012525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => METHOD OF OPERATING MEMORY DEVICE, METHOD OF OPERATING MEMORY CONTROLLER AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/692953 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692953 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/692953
Method of operating memory device, method of operating memory controller and memory system Mar 10, 2022 Issued
Array ( [id] => 17674874 [patent_doc_number] => 20220188041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => QUASI-VOLATILE MEMORY DEVICE WITH A BACK-CHANNEL USAGE [patent_app_type] => utility [patent_app_number] => 17/688095 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12613 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -43 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17688095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/688095
Quasi-volatile memory device with a back-channel usage Mar 6, 2022 Issued
Array ( [id] => 18334559 [patent_doc_number] => 20230126507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => APPARATUS AND METHOD FOR PROGRAMMING DATA IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/682602 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25481 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682602 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682602
Apparatus and method for programming data in a memory device Feb 27, 2022 Issued
Array ( [id] => 18703304 [patent_doc_number] => 11789815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Memory controller and memory device including the same [patent_app_type] => utility [patent_app_number] => 17/681058 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 8565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17681058 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/681058
Memory controller and memory device including the same Feb 24, 2022 Issued
Array ( [id] => 17659398 [patent_doc_number] => 20220179863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => STORING DATA AND PARITY VIA A COMPUTING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/679835 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/679835
Storing data and parity via a computing system Feb 23, 2022 Issued
Array ( [id] => 17629237 [patent_doc_number] => 20220164252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => ERROR CORRECTING CODES FOR MULTI-MASTER MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/670582 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670582 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670582
Error correcting codes for multi-master memory controller Feb 13, 2022 Issued
Array ( [id] => 17753500 [patent_doc_number] => 20220231705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => METHOD AND APPARATUS FOR LOW DENSITY PARITY CHECK CHANNEL CODING IN WIRELESS COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/591347 [patent_app_country] => US [patent_app_date] => 2022-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 509 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591347 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/591347
Method and apparatus for low density parity check channel coding in wireless communication system Feb 1, 2022 Issued
Array ( [id] => 18687050 [patent_doc_number] => 11782787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Dynamic error control configuration for memory systems [patent_app_type] => utility [patent_app_number] => 17/584034 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 12655 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17584034 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/584034
Dynamic error control configuration for memory systems Jan 24, 2022 Issued
Array ( [id] => 17736681 [patent_doc_number] => 20220222140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => ERROR CORRECTION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/582185 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582185 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/582185
Error correction system Jan 23, 2022 Issued
Array ( [id] => 18638134 [patent_doc_number] => 11762736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Semiconductor memory devices [patent_app_type] => utility [patent_app_number] => 17/580048 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 16370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17580048 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/580048
Semiconductor memory devices Jan 19, 2022 Issued
Array ( [id] => 18499286 [patent_doc_number] => 20230222032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => ERROR EVALUATION FOR A MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/572129 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17572129 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/572129
Error evaluation for a memory system Jan 9, 2022 Issued
Array ( [id] => 17565199 [patent_doc_number] => 20220129348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => ERROR CHECK AND SCRUB FOR SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/571189 [patent_app_country] => US [patent_app_date] => 2022-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17571189 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/571189
Error check and scrub for semiconductor memory device Jan 6, 2022 Issued
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