Search

Ha Dinh Ho

Examiner (ID: 9897)

Most Active Art Unit
3681
Art Unit(s)
3658, 3655, 3681, 3618
Total Applications
2226
Issued Applications
1927
Pending Applications
80
Abandoned Applications
198

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2750607 [patent_doc_number] => 05028987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-02 [patent_title] => 'High current hermetic package having a lead extending through the package lid and a packaged semiconductor chip' [patent_app_type] => 1 [patent_app_number] => 7/375569 [patent_app_country] => US [patent_app_date] => 1989-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 3991 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/028/05028987.pdf [firstpage_image] =>[orig_patent_app_number] => 375569 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/375569
High current hermetic package having a lead extending through the package lid and a packaged semiconductor chip Jul 2, 1989 Issued
Array ( [id] => 2676256 [patent_doc_number] => 04954878 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-04 [patent_title] => 'Method of packaging and powering integrated circuit chips and the chip assembly formed thereby' [patent_app_type] => 1 [patent_app_number] => 7/373960 [patent_app_country] => US [patent_app_date] => 1989-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3091 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/954/04954878.pdf [firstpage_image] =>[orig_patent_app_number] => 373960 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/373960
Method of packaging and powering integrated circuit chips and the chip assembly formed thereby Jun 28, 1989 Issued
Array ( [id] => 2752094 [patent_doc_number] => 05023700 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-11 [patent_title] => 'Minutely patterned structure' [patent_app_type] => 1 [patent_app_number] => 7/367257 [patent_app_country] => US [patent_app_date] => 1989-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 28 [patent_no_of_words] => 4399 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/023/05023700.pdf [firstpage_image] =>[orig_patent_app_number] => 367257 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/367257
Minutely patterned structure Jun 15, 1989 Issued
Array ( [id] => 2651392 [patent_doc_number] => 04971676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-20 [patent_title] => 'Support device for a thin substrate of a semiconductor material' [patent_app_type] => 1 [patent_app_number] => 7/365861 [patent_app_country] => US [patent_app_date] => 1989-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1790 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/971/04971676.pdf [firstpage_image] =>[orig_patent_app_number] => 365861 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/365861
Support device for a thin substrate of a semiconductor material Jun 13, 1989 Issued
Array ( [id] => 2638641 [patent_doc_number] => 04958222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-18 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 7/363759 [patent_app_country] => US [patent_app_date] => 1989-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3748 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 534 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/958/04958222.pdf [firstpage_image] =>[orig_patent_app_number] => 363759 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/363759
Semiconductor integrated circuit device Jun 8, 1989 Issued
Array ( [id] => 2741005 [patent_doc_number] => 04998159 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-05 [patent_title] => 'Ceramic laminated circuit substrate' [patent_app_type] => 1 [patent_app_number] => 7/362924 [patent_app_country] => US [patent_app_date] => 1989-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 11075 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/998/04998159.pdf [firstpage_image] =>[orig_patent_app_number] => 362924 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/362924
Ceramic laminated circuit substrate Jun 7, 1989 Issued
07/360960 SUPPLY PIN REARRANGEMENT FOR AN I.C. Jun 1, 1989 Abandoned
07/359239 POST MOLDED CAVITY PACKAGE WITH INTERNAL DAM BAR FOR INTEGRATED CIRCUIT May 30, 1989 Abandoned
Array ( [id] => 2633697 [patent_doc_number] => 04967244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-30 [patent_title] => 'Power semiconductor component with switch-off facility' [patent_app_type] => 1 [patent_app_number] => 7/334567 [patent_app_country] => US [patent_app_date] => 1989-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3108 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/967/04967244.pdf [firstpage_image] =>[orig_patent_app_number] => 334567 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/334567
Power semiconductor component with switch-off facility Apr 6, 1989 Issued
Array ( [id] => 2596433 [patent_doc_number] => 04970572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-13 [patent_title] => 'Semiconductor integrated circuit device of multilayer interconnection structure' [patent_app_type] => 1 [patent_app_number] => 7/318791 [patent_app_country] => US [patent_app_date] => 1989-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3302 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/970/04970572.pdf [firstpage_image] =>[orig_patent_app_number] => 318791 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/318791
Semiconductor integrated circuit device of multilayer interconnection structure Mar 2, 1989 Issued
Array ( [id] => 2700647 [patent_doc_number] => 05019891 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-28 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 7/296003 [patent_app_country] => US [patent_app_date] => 1989-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 7203 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/019/05019891.pdf [firstpage_image] =>[orig_patent_app_number] => 296003 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/296003
Semiconductor device and method of fabricating the same Jan 11, 1989 Issued
Array ( [id] => 2754633 [patent_doc_number] => 05016089 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-14 [patent_title] => 'Substrate for hybrid IC, hybrid IC using the substrate and its applications' [patent_app_type] => 1 [patent_app_number] => 7/293443 [patent_app_country] => US [patent_app_date] => 1989-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5463 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/016/05016089.pdf [firstpage_image] =>[orig_patent_app_number] => 293443 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/293443
Substrate for hybrid IC, hybrid IC using the substrate and its applications Jan 3, 1989 Issued
Array ( [id] => 2599903 [patent_doc_number] => 04918512 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-17 [patent_title] => 'Semiconductor package having an outwardly arced die cavity' [patent_app_type] => 1 [patent_app_number] => 7/286676 [patent_app_country] => US [patent_app_date] => 1988-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 999 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/918/04918512.pdf [firstpage_image] =>[orig_patent_app_number] => 286676 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/286676
Semiconductor package having an outwardly arced die cavity Dec 18, 1988 Issued
Array ( [id] => 2687164 [patent_doc_number] => 05005070 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-02 [patent_title] => 'Soldering interconnect method and apparatus for semiconductor packages' [patent_app_type] => 1 [patent_app_number] => 7/285988 [patent_app_country] => US [patent_app_date] => 1988-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3979 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/005/05005070.pdf [firstpage_image] =>[orig_patent_app_number] => 285988 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/285988
Soldering interconnect method and apparatus for semiconductor packages Dec 18, 1988 Issued
07/281016 TAPE AUTOMATED BONDING PROCESS AND LEAD PACKAGE AND REUSABLE TRANSPORT TAPE FOR USE THEREWITH Dec 6, 1988 Abandoned
Array ( [id] => 2714294 [patent_doc_number] => 05014111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-07 [patent_title] => 'Electrical contact bump and a package provided with the same' [patent_app_type] => 1 [patent_app_number] => 7/279101 [patent_app_country] => US [patent_app_date] => 1988-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 4229 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/014/05014111.pdf [firstpage_image] =>[orig_patent_app_number] => 279101 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/279101
Electrical contact bump and a package provided with the same Dec 1, 1988 Issued
Array ( [id] => 2653450 [patent_doc_number] => 04980753 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-25 [patent_title] => 'Low-cost high-performance semiconductor chip package' [patent_app_type] => 1 [patent_app_number] => 7/274290 [patent_app_country] => US [patent_app_date] => 1988-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 12391 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/980/04980753.pdf [firstpage_image] =>[orig_patent_app_number] => 274290 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/274290
Low-cost high-performance semiconductor chip package Nov 20, 1988 Issued
Array ( [id] => 2638850 [patent_doc_number] => 04977444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-11 [patent_title] => 'Semiconductor cooling apparatus' [patent_app_type] => 1 [patent_app_number] => 7/261639 [patent_app_country] => US [patent_app_date] => 1988-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 33 [patent_no_of_words] => 17438 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/977/04977444.pdf [firstpage_image] =>[orig_patent_app_number] => 261639 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/261639
Semiconductor cooling apparatus Oct 23, 1988 Issued
07/224412 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE IN WHICH INTEGRATED CIRCUIT UNITS HAVING DIFFERENT FUNCTIONS ARE STACKED IN THREE-DIMENSIONAL MANNER Jul 25, 1988 Abandoned
Array ( [id] => 2649953 [patent_doc_number] => 04939570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-03 [patent_title] => 'High power, pluggable tape automated bonding package' [patent_app_type] => 1 [patent_app_number] => 7/223580 [patent_app_country] => US [patent_app_date] => 1988-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2019 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/939/04939570.pdf [firstpage_image] =>[orig_patent_app_number] => 223580 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/223580
High power, pluggable tape automated bonding package Jul 24, 1988 Issued
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