Application number | Title of the application | Filing Date | Status |
---|
Array
(
[id] => 3692480
[patent_doc_number] => 05691569
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Integrated circuit package that has a plurality of staggered pins'
[patent_app_type] => 1
[patent_app_number] => 8/575498
[patent_app_country] => US
[patent_app_date] => 1995-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 1228
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[pdf_file] => patents/05/691/05691569.pdf
[firstpage_image] =>[orig_patent_app_number] => 575498
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/575498 | Integrated circuit package that has a plurality of staggered pins | Dec 19, 1995 | Issued |
Array
(
[id] => 3626217
[patent_doc_number] => 05689135
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-18
[patent_title] => 'Multi-chip device and method of fabrication employing leads over and under processes'
[patent_app_type] => 1
[patent_app_number] => 8/574994
[patent_app_country] => US
[patent_app_date] => 1995-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3264
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/689/05689135.pdf
[firstpage_image] =>[orig_patent_app_number] => 574994
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/574994 | Multi-chip device and method of fabrication employing leads over and under processes | Dec 18, 1995 | Issued |
08/568864 | SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING LEAD FRAME | Dec 4, 1995 | Abandoned |
Array
(
[id] => 3845803
[patent_doc_number] => 05744869
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-28
[patent_title] => 'Apparatus for mounting a flip-chip semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/567518
[patent_app_country] => US
[patent_app_date] => 1995-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 1909
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 143
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/744/05744869.pdf
[firstpage_image] =>[orig_patent_app_number] => 567518
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567518 | Apparatus for mounting a flip-chip semiconductor device | Dec 4, 1995 | Issued |
Array
(
[id] => 3652996
[patent_doc_number] => 05684330
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-04
[patent_title] => 'Chip-sized package having metal circuit substrate'
[patent_app_type] => 1
[patent_app_number] => 8/563402
[patent_app_country] => US
[patent_app_date] => 1995-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 1943
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/684/05684330.pdf
[firstpage_image] =>[orig_patent_app_number] => 563402
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/563402 | Chip-sized package having metal circuit substrate | Nov 29, 1995 | Issued |
08/565146 | THERMALLY EFFICIENT INTEGRATED CIRCUIT PACKAGE | Nov 29, 1995 | Abandoned |
Array
(
[id] => 3782334
[patent_doc_number] => 05818106
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-06
[patent_title] => 'Semiconductor device having a capacitor formed on a surface of a closure'
[patent_app_type] => 1
[patent_app_number] => 8/564500
[patent_app_country] => US
[patent_app_date] => 1995-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3351
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/818/05818106.pdf
[firstpage_image] =>[orig_patent_app_number] => 564500
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/564500 | Semiconductor device having a capacitor formed on a surface of a closure | Nov 28, 1995 | Issued |
Array
(
[id] => 3987587
[patent_doc_number] => 05861654
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-19
[patent_title] => 'Image sensor assembly'
[patent_app_type] => 1
[patent_app_number] => 8/563832
[patent_app_country] => US
[patent_app_date] => 1995-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2453
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/861/05861654.pdf
[firstpage_image] =>[orig_patent_app_number] => 563832
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/563832 | Image sensor assembly | Nov 27, 1995 | Issued |
Array
(
[id] => 3835971
[patent_doc_number] => 05739582
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-14
[patent_title] => 'Method of packaging a high voltage device array in a multi-chip module'
[patent_app_type] => 1
[patent_app_number] => 8/562614
[patent_app_country] => US
[patent_app_date] => 1995-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 1758
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/739/05739582.pdf
[firstpage_image] =>[orig_patent_app_number] => 562614
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/562614 | Method of packaging a high voltage device array in a multi-chip module | Nov 23, 1995 | Issued |
Array
(
[id] => 3835956
[patent_doc_number] => 05739581
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-14
[patent_title] => 'High density integrated circuit package assembly with a heatsink between stacked dies'
[patent_app_type] => 1
[patent_app_number] => 8/560280
[patent_app_country] => US
[patent_app_date] => 1995-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3166
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/739/05739581.pdf
[firstpage_image] =>[orig_patent_app_number] => 560280
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/560280 | High density integrated circuit package assembly with a heatsink between stacked dies | Nov 16, 1995 | Issued |
Array
(
[id] => 3698669
[patent_doc_number] => 05661337
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-26
[patent_title] => 'Technique for improving bonding strength of leadframe to substrate in semiconductor IC chip packages'
[patent_app_type] => 1
[patent_app_number] => 8/553214
[patent_app_country] => US
[patent_app_date] => 1995-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3562
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/661/05661337.pdf
[firstpage_image] =>[orig_patent_app_number] => 553214
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/553214 | Technique for improving bonding strength of leadframe to substrate in semiconductor IC chip packages | Nov 6, 1995 | Issued |
Array
(
[id] => 3698735
[patent_doc_number] => 05661342
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-26
[patent_title] => 'Semiconductor device with heat sink including positioning pins'
[patent_app_type] => 1
[patent_app_number] => 8/552770
[patent_app_country] => US
[patent_app_date] => 1995-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 2880
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/661/05661342.pdf
[firstpage_image] =>[orig_patent_app_number] => 552770
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/552770 | Semiconductor device with heat sink including positioning pins | Nov 2, 1995 | Issued |
Array
(
[id] => 3710863
[patent_doc_number] => 05654587
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-05
[patent_title] => 'Stackable heatsink structure for semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 8/547277
[patent_app_country] => US
[patent_app_date] => 1995-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 4355
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/654/05654587.pdf
[firstpage_image] =>[orig_patent_app_number] => 547277
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/547277 | Stackable heatsink structure for semiconductor devices | Oct 23, 1995 | Issued |
Array
(
[id] => 3736322
[patent_doc_number] => 05693981
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-02
[patent_title] => 'Electronic system with heat dissipating apparatus and method of dissipating heat in an electronic system'
[patent_app_type] => 1
[patent_app_number] => 8/544284
[patent_app_country] => US
[patent_app_date] => 1995-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 7031
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/693/05693981.pdf
[firstpage_image] =>[orig_patent_app_number] => 544284
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/544284 | Electronic system with heat dissipating apparatus and method of dissipating heat in an electronic system | Oct 16, 1995 | Issued |
Array
(
[id] => 3626245
[patent_doc_number] => 05689137
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-18
[patent_title] => 'Method for transfer molding standard electronic packages and apparatus formed thereby'
[patent_app_type] => 1
[patent_app_number] => 8/543762
[patent_app_country] => US
[patent_app_date] => 1995-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 4754
[patent_no_of_claims] => 21
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[pdf_file] => patents/05/689/05689137.pdf
[firstpage_image] =>[orig_patent_app_number] => 543762
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/543762 | Method for transfer molding standard electronic packages and apparatus formed thereby | Oct 15, 1995 | Issued |
08/543132 | SOLDERABLE TRANSISTOR CLIP AND HEAT SINK | Oct 12, 1995 | Abandoned |
Array
(
[id] => 3534387
[patent_doc_number] => 05583373
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-10
[patent_title] => 'Apparatus for achieving mechanical and thermal isolation of portions of integrated monolithic circuits'
[patent_app_type] => 1
[patent_app_number] => 8/541258
[patent_app_country] => US
[patent_app_date] => 1995-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3842
[patent_no_of_claims] => 17
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/583/05583373.pdf
[firstpage_image] =>[orig_patent_app_number] => 541258
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/541258 | Apparatus for achieving mechanical and thermal isolation of portions of integrated monolithic circuits | Oct 11, 1995 | Issued |
Array
(
[id] => 3666850
[patent_doc_number] => 05625229
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-29
[patent_title] => 'Heat sink fin assembly for cooling an LSI package'
[patent_app_type] => 1
[patent_app_number] => 8/538232
[patent_app_country] => US
[patent_app_date] => 1995-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 43
[patent_no_of_words] => 10867
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 12
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/625/05625229.pdf
[firstpage_image] =>[orig_patent_app_number] => 538232
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/538232 | Heat sink fin assembly for cooling an LSI package | Oct 2, 1995 | Issued |
08/536426 | INTEGRATED CIRCUIT AND SUPPLY DECOUPLING CAPACITOR THEREFOR | Sep 28, 1995 | Abandoned |
Array
(
[id] => 3633361
[patent_doc_number] => 05686759
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Integrated circuit package with permanent identification of device characteristics and method for adding the same'
[patent_app_type] => 1
[patent_app_number] => 8/536353
[patent_app_country] => US
[patent_app_date] => 1995-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/686/05686759.pdf
[firstpage_image] =>[orig_patent_app_number] => 536353
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/536353 | Integrated circuit package with permanent identification of device characteristics and method for adding the same | Sep 28, 1995 | Issued |