Application number | Title of the application | Filing Date | Status |
---|
Array
(
[id] => 3602831
[patent_doc_number] => 05559363
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Off-chip impedance matching utilizing a dielectric element and high density interconnect technology'
[patent_app_type] => 1
[patent_app_number] => 8/469706
[patent_app_country] => US
[patent_app_date] => 1995-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4462
[patent_no_of_claims] => 20
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[patent_words_short_claim] => 228
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/559/05559363.pdf
[firstpage_image] =>[orig_patent_app_number] => 469706
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/469706 | Off-chip impedance matching utilizing a dielectric element and high density interconnect technology | Jun 5, 1995 | Issued |
Array
(
[id] => 3852903
[patent_doc_number] => 05719438
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-17
[patent_title] => 'Method and workpiece for connecting a thin layer to a monolithic electronic module\'s surface and associated module packaging'
[patent_app_type] => 1
[patent_app_number] => 8/469090
[patent_app_country] => US
[patent_app_date] => 1995-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 39
[patent_no_of_words] => 12508
[patent_no_of_claims] => 84
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/719/05719438.pdf
[firstpage_image] =>[orig_patent_app_number] => 469090
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/469090 | Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging | Jun 5, 1995 | Issued |
Array
(
[id] => 3624334
[patent_doc_number] => 05614735
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-25
[patent_title] => 'Semiconductor laser device'
[patent_app_type] => 1
[patent_app_number] => 8/463070
[patent_app_country] => US
[patent_app_date] => 1995-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 23
[patent_no_of_words] => 4665
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/614/05614735.pdf
[firstpage_image] =>[orig_patent_app_number] => 463070
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/463070 | Semiconductor laser device | Jun 4, 1995 | Issued |
08/459700 | MULTILEVEL HEAT-DISSIPATING ELEMENTS FOR SEMICONDUCTOR DEVICES | Jun 1, 1995 | Abandoned |
Array
(
[id] => 3496478
[patent_doc_number] => 05561329
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-01
[patent_title] => 'Compositions for protecting semiconductor elements and semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 8/452760
[patent_app_country] => US
[patent_app_date] => 1995-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 5043
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/561/05561329.pdf
[firstpage_image] =>[orig_patent_app_number] => 452760
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/452760 | Compositions for protecting semiconductor elements and semiconductor devices | May 29, 1995 | Issued |
Array
(
[id] => 3524312
[patent_doc_number] => 05530295
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Drop-in heat sink'
[patent_app_type] => 1
[patent_app_number] => 8/451478
[patent_app_country] => US
[patent_app_date] => 1995-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 1559
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/530/05530295.pdf
[firstpage_image] =>[orig_patent_app_number] => 451478
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/451478 | Drop-in heat sink | May 25, 1995 | Issued |
Array
(
[id] => 3602913
[patent_doc_number] => 05559369
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Ground plane for plastic encapsulated integrated circuit die packages'
[patent_app_type] => 1
[patent_app_number] => 8/447930
[patent_app_country] => US
[patent_app_date] => 1995-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 2553
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/559/05559369.pdf
[firstpage_image] =>[orig_patent_app_number] => 447930
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/447930 | Ground plane for plastic encapsulated integrated circuit die packages | May 22, 1995 | Issued |
08/443799 | LOW THERMAL RESISTANCE SPRING BIASED RF SEMICONDUCTOR PACKAGE MOUNTING STRUCTURE | May 17, 1995 | Abandoned |
08/437408 | INTEGRATED CIRCUIT PACKAGE PROVIDED WITH MULTIPLE HEAT-CONDUCTING PATHS FOR ENHANCING HEAT DISSIPATION AND WRAPPING-AROUND CAP FOR IMPROVING PACKAGE INTEGRITY AND RELIABILITY | May 11, 1995 | Abandoned |
Array
(
[id] => 3579947
[patent_doc_number] => 05523621
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-04
[patent_title] => 'Semiconductor device having a multilayer ceramic wiring substrate'
[patent_app_type] => 1
[patent_app_number] => 8/438968
[patent_app_country] => US
[patent_app_date] => 1995-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 5524
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/523/05523621.pdf
[firstpage_image] =>[orig_patent_app_number] => 438968
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/438968 | Semiconductor device having a multilayer ceramic wiring substrate | May 10, 1995 | Issued |
08/431457 | SEMICONDUCTOR PACKAGE AND FABRICATING METHOD THEREOF | Apr 30, 1995 | Abandoned |
08/427958 | SEMICONDUCTOR PACKAGE | Apr 25, 1995 | Abandoned |
08/427999 | SEMICONDUCTOR DEVICE AND A METHOD FOR MAKING SEMICONDUCTOR DEVICE | Apr 24, 1995 | Abandoned |
08/427954 | INTEGRATED CIRCUIT CARD | Apr 23, 1995 | Abandoned |
Array
(
[id] => 3651912
[patent_doc_number] => 05637921
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-10
[patent_title] => 'Sub-ambient temperature electronic package'
[patent_app_type] => 1
[patent_app_number] => 8/426286
[patent_app_country] => US
[patent_app_date] => 1995-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1967
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/637/05637921.pdf
[firstpage_image] =>[orig_patent_app_number] => 426286
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/426286 | Sub-ambient temperature electronic package | Apr 20, 1995 | Issued |
Array
(
[id] => 3653321
[patent_doc_number] => 05640044
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-17
[patent_title] => 'Semiconductor device and method of producing said semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/421183
[patent_app_country] => US
[patent_app_date] => 1995-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 33
[patent_no_of_words] => 11032
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/640/05640044.pdf
[firstpage_image] =>[orig_patent_app_number] => 421183
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/421183 | Semiconductor device and method of producing said semiconductor device | Apr 12, 1995 | Issued |
Array
(
[id] => 3533661
[patent_doc_number] => 05528370
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-18
[patent_title] => 'Apparatus and method for measuring variations in thickness of an optical interference element'
[patent_app_type] => 1
[patent_app_number] => 8/412804
[patent_app_country] => US
[patent_app_date] => 1995-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 3566
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/528/05528370.pdf
[firstpage_image] =>[orig_patent_app_number] => 412804
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/412804 | Apparatus and method for measuring variations in thickness of an optical interference element | Mar 28, 1995 | Issued |
Array
(
[id] => 3496407
[patent_doc_number] => 05561324
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-01
[patent_title] => 'Semiconductor chip mounting sector'
[patent_app_type] => 1
[patent_app_number] => 8/409923
[patent_app_country] => US
[patent_app_date] => 1995-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1433
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/561/05561324.pdf
[firstpage_image] =>[orig_patent_app_number] => 409923
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/409923 | Semiconductor chip mounting sector | Mar 22, 1995 | Issued |
Array
(
[id] => 3732830
[patent_doc_number] => 05703389
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-30
[patent_title] => 'Vertical IGFET configuration having low on-resistance and method'
[patent_app_type] => 1
[patent_app_number] => 8/393772
[patent_app_country] => US
[patent_app_date] => 1995-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3341
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/703/05703389.pdf
[firstpage_image] =>[orig_patent_app_number] => 393772
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/393772 | Vertical IGFET configuration having low on-resistance and method | Feb 23, 1995 | Issued |
08/385528 | SEMICONDUCTOR DEVICE WITH INCREASED ON CHIP DECOUPLING CAPACITANCE | Feb 7, 1995 | Abandoned |